公开(公告)号：US06546492B1

公开(公告)日：2003-04-08

申请号：US09277434

申请日：1999-03-26

申请人： Anthony Dean Walker ,  John S. Petty

发明人： Anthony Dean Walker ,  John S. Petty

IPC分类号： G06F124

CPC分类号： G06F21/572 ,  G06F8/65 ,  G06F2221/2103

摘要： A system and method for updating software for a remote unit over a network is disclosed herein. The system and method includes the remote unit, an authentication server and an update server. The remote unit may have a flasher host for communicating over the network and for transmitting commands to the remote unit. The system and method allows for the verification of a request message from the remote unit, and a response from the authentication server. The response message to the remote unit from the authentication server will contain an decryption key to decrypt the update file that will be sent by the update server. Such an authentication process prevents rogue programs from being sent to the remote unit thereby decreasing the potential for cellular fraud.

摘要翻译： 本文公开了一种用于通过网络更新远程单元的软件的系统和方法。 该系统和方法包括远程单元，认证服务器和更新服务器。 远程单元可以具有闪烁主机，用于通过网络进行通信并将命令发送到远程单元。 系统和方法允许来自远程单元的请求消息的验证以及来自认证服务器的响应。 来自认证服务器的远程单元的响应消息将包含一个解密密钥来解密将由更新服务器发送的更新文件。 这样的认证过程防止流氓程序被发送到远程单元，从而减少蜂窝欺诈的可能性。

公开(公告)号：US20100057427A1

公开(公告)日：2010-03-04

申请号：US12204047

申请日：2008-09-04

申请人： Anthony Dean Walker

发明人： Anthony Dean Walker

IPC分类号： G06F9/38 ,  G06F9/00 ,  G06F12/08

CPC分类号： G06F17/5022 ,  G06F9/3844 ,  G06F2217/68

摘要： A processor simulation environment includes a processor execution model operative to simulate the execution of processor instructions according to the characteristics of a target processor, and branch override logic. When the processor execution model decodes a branch instruction, it requests a branch directive from the branch override logic. In response to the request, the branch override logic provides a branch directive that resolves the branch evaluation. The request may include a branch instruction address. The branch override logic may index an execution trace of instructions executed on a processor compatible with the target processor, using the branch instruction address. The branch directive may include an override branch target address, which may be obtained from the instruction trace, or otherwise calculated by the branch override logic. In this manner, accurate program execution order may be simulated in a simulation environment in which complex I/O is not modeled.

摘要翻译： 处理器模拟环境包括可根据目标处理器的特性和分支覆盖逻辑模拟处理器指令的执行的处理器执行模型。 当处理器执行模型解码分支指令时，它从分支覆盖逻辑请求分支指令。 响应该请求，分支覆盖逻辑提供了解决分支评估的分支指令。 请求可以包括分支指令地址。 分支覆盖逻辑可以使用分支指令地址来索引在与目标处理器兼容的处理器上执行的指令的执行跟踪。 分支指令可以包括覆盖分支目标地址，其可以从指令跟踪获得，或者由分支覆盖逻辑计算。 以这种方式，可以在不建模复杂I / O的模拟环境中模拟准确的程序执行顺序。

公开(公告)号：US20110119044A1

公开(公告)日：2011-05-19

申请号：US12198595

申请日：2008-08-26

申请人： Anthony Dean Walker

发明人： Anthony Dean Walker

IPC分类号： G06F9/455

CPC分类号： G06F17/5022 ,  G06F11/3409 ,  G06F11/3461 ,  G06F11/349 ,  G06F2201/87 ,  G06F2201/88 ,  G06F2201/885

摘要： An efficient, cycle-accurate processor execution simulator models a target processor by executing a program execution image comprising instructions having run-time dependencies resolved by execution on an existing processor compatible with the target processor. The instructions may have been executed upon a processor in an I/O environment too complex to model. In one embodiment, the simulator executes instructions that were directly executed on a processor. In another embodiment, a markup engine alters a compiled program image, with reference to instructions executed on a processor, to remove run-time dependencies. The marked up program image is then executed by the simulator. The processor execution simulator includes an update engine operative to cycle-accurately simulate instruction execution, and a communication engine operative to model each communication bus of the target processor.

摘要翻译： 有效的，循环精确的处理器执行模拟器通过执行程序执行图像来建模目标处理器，该程序执行图像包括具有通过在与目标处理器兼容的现有处理器上的执行而被解决的运行时依赖性的指令 指令可能已经在I / O环境中的处理器上执行过于复杂，无法建模。 在一个实施例中，模拟器执行在处理器上直接执行的指令。 在另一个实施例中，标记引擎参照在处理器上执行的指令来改变已编译的程序图像，以去除运行时依赖性。 标记的程序图像然后由模拟器执行。 处理器执行模拟器包括可操作以循环精确地模拟指令执行的更新引擎和可操作以对目标处理器的每个通信总线进行建模的通信引擎。

公开(公告)号：US07240087B1

公开(公告)日：2007-07-03

申请号：US08883710

申请日：1997-06-27

申请人： Anthony Dean Walker

发明人： Anthony Dean Walker

IPC分类号： G06F15/16

CPC分类号： H04L1/188

摘要： A communication network implements a timing system that closely approximates network response times so that information may be transmitted between two data processing systems within the network in a timely and efficient manner. During operation of the communication network, a sending data processing system sends query data to a receiving data processing system. A response timer within the sending data processing system is initialized to track the query operation. If the receiving data processing system provides a response to the sending data processing system before the response timer expires, the timing implemented for data communications is proper for the communication network. However, if the receiving data processing system fails to provide a response within a time specified by the response timer, the transmitting data processing system resends a query frame. Subsequently, the sending data processing system in the communication network gradually increases a response time until the time measured by the response timer does not expire before a response is received by the sending data processing system.

摘要翻译： 通信网络实现了一种紧密接近网络响应时间的定时系统，从而可以及时有效地在网络内的两个数据处理系统之间传输信息。 在通信网络的操作期间，发送数据处理系统向接收数据处理系统发送查询数据。 发送数据处理系统内的响应定时器被初始化以跟踪查询操作。 如果接收数据处理系统在响应定时器到期之前提供对发送数据处理系统的响应，则为数据通信实现的定时适用于通信网络。 然而，如果接收数据处理系统在由响应定时器指定的时间内未能提供响应，则发送数据处理系统重新发送查询帧。 随后，通信网络中的发送数据处理系统逐渐增加响应时间，直到响应定时器测量的时间在发送数据处理系统接收到响应之前不会过期。

公开(公告)号：US5646939A

公开(公告)日：1997-07-08

申请号：US512719

申请日：1995-08-08

申请人： Carl Lindeborg ,  Edward Carroll ,  James Moran ,  David Bartolini ,  John Griesing ,  Liz Lindell ,  Anthony Dean Walker ,  Bradley S. Trubey

发明人： Carl Lindeborg ,  Edward Carroll ,  James Moran ,  David Bartolini ,  John Griesing ,  Liz Lindell ,  Anthony Dean Walker ,  Bradley S. Trubey

IPC分类号： H04L12/433 ,  H04L29/12 ,  H04L12/26

CPC分类号： H04L29/12018 ,  H04L12/433 ,  H04L29/12009 ,  H04L61/10 ,  Y10S370/909

摘要： A token ring network performs address to port mapping by taking advantage of the abilities of the port switched modules and the neighbor notification process, in order to perform address to port mapping on each individual module. Ring monitors are switched from an upstream side of a port to a downstream side of a port when the neighbor notification process enters the port domain. The processor on the module records all the addresses received on the downstream side of the port, when the neighbor notification process is in the domain of that port. If it appears that the neighbor notification process is in the domain of two adjacent ports, the present invention only records addresses from the most downstream of the two adjacent ports, since such a situation is an indication that the upstream ports do not conform to MAC protocol. If a non-protocol station is connected to the last port in a module, the module will collect addresses from that port until the neighbor notification process enters the most upstream port of the module. At that point, addresses are no longer recorded in the most downstream port, and each set of addresses for each port are checked to determine if the last entry in each port has the ARI bits set to one and the source address is similar to the address of the most upstream neighbor of the module. If the addresses are the same, all addresses recorded in that port are ignored, since that port contains a non-protocol station.

摘要翻译： 令牌环网络通过利用端口交换模块和邻居通知过程的能力来执行地址到端口映射，以便在每个单独模块上执行地址到端口映射。 当邻居通知进程进入端口域时，环形监视器从端口的上游侧切换到端口的下游侧。 当邻居通知进程在该端口的域中时，模块上的处理器将记录端口下游接收的所有地址。 如果邻居通知过程似乎在两个相邻端口的域中，则本发明仅记录来自两个相邻端口最下游的地址，因为这种情况是指示上行端口不符合MAC协议 。 如果非协议站连接到模块中的最后一个端口，则该模块将从该端口收集地址，直到邻居通知进程进入模块的最上游端口。 在这一点上，地址不再被记录在最下游端口，并且每个端口的每组地址被检查以确定每个端口中的最后一个条目是否具有设置为1的ARI位，并且源地址类似于地址 的模块的最上游邻居。 如果地址相同，则该端口中记录的所有地址都将被忽略，因为该端口包含非协议站。