公开(公告)号：US20240028339A1

公开(公告)日：2024-01-25

申请号：US17814729

申请日：2022-07-25

Applicant: Apple Inc.

Inventor： Niket K. Choudhary ,  Mary D. Brown ,  Ethan R. Schuchman ,  Ronald P. Hall ,  Ian D. Kountanis ,  Douglas C. Holman ,  Ilhyun Kim ,  Abhishek Kumar ,  Siavash Zangeneh Kamali

IPC: G06F9/38 ,  G06F12/0875

CPC classification number: G06F9/3802 ,  G06F12/0875 ,  G06F2212/452

Abstract: An apparatus includes an instruction cache circuit and an instruction fetch circuit. The instruction fetch circuit is configured to retrieve, from the instruction cache circuit, a fetch group that includes a plurality of instructions for execution by a processing circuit, and to make a determination that the fetch group includes a control transfer instruction that is predicted to be taken. A target address associated with the control transfer instruction is directed to an instruction within the fetch group. The instruction fetch circuit is further configured to, based on the determination, alter instructions within the fetch group in a manner that is based on a type of the control transfer instruction.