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公开(公告)号：US11049448B2
公开(公告)日：2021-06-29
申请号：US16399792
申请日：2019-04-30
Applicant: Apple Inc.
Inventor： Ivan Knez , Tien-Chien Kuo , Yingkan Lin , Bilin Wang , Kanghoon Jeon , Mitchell Herman Kline , Hopil Bae , Jose Antonio Dominguez-Caballero , Chun-Yao Huang , Syed Farhan Mohiuddin
IPC: G09G3/3233 , G06F1/16 , G04G9/10
Abstract: An electronic display may include an active area having a first pixel formed in the active area, where the first pixel emits light in response to image data. The electronic display may also include a controller to transmit the image data to the first pixel. The first pixel may include an organic light-emitting diode that emits the light in response to the image data, memory to digitally store the image data received from the controller, and driver circuitry to receive the image data from the memory. The driver circuitry may cause the organic light-emitting diode to emit the light in response to the image data.
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公开(公告)号：US12230211B2
公开(公告)日：2025-02-18
申请号：US18239673
申请日：2023-08-29
Applicant: Apple Inc.
Inventor： Yingkan Lin , Tien-Chien Kuo , Bilin Wang , Kanghoon Jeon , Ivan Knez , Chun-Yao Huang
IPC: G09G3/3258 , G09G3/32 , G09G3/3266 , G09G3/3275
Abstract: A pixel circuit for an electronic display may include a memory to store a digital data signal indicative of a value within a data range. The pixel circuit may also include a light-emitting diode to emit light based at least in part on the digital data signal. The pixel circuit may also include an initialization transistor to initialize the pixel circuit before the light-emitting diode emits light and a driving transistor to activate based at least in part on the digital data signal.
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公开(公告)号：US20230014712A1
公开(公告)日：2023-01-19
申请号：US17949949
申请日：2022-09-21
Applicant: Apple Inc.
Inventor： Bilin Wang , Tien-Chien Kuo , Kanghoon Jeon , Chun-Yao Huang
IPC: G09G3/3291 , G09G5/397 , G09G3/36
Abstract: A display system may include a memory external to a pixel that stores a first digital data value, a memory internal to the pixel that stores a second digital data signal, where a combination of the first digital data signal and the second digital data signal may indicate a target gray level assigned to the pixel for a particular image frame. The pixel may be driven for a first duration of time according to the first digital data signal and for a second duration of time according to the second digital data signal.
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公开(公告)号：US11138950B1
公开(公告)日：2021-10-05
申请号：US16688898
申请日：2019-11-19
Applicant: Apple Inc.
Inventor： Tien-Chien Kuo , Ivan Knez , Bilin Wang , Hopil Bae , Kanghoon Jeon , Chun-Yao Huang , Denis Michel Darmon
IPC: G09G5/00
Abstract: Efficiently transmitting image data to an electronic display may be provided by skipping regions of the electronic display that display a default value. The electronic display may include a number of pixels, a row driver, and a data driver. The row driver may activate a first subset of the pixels for programming. The data driver may program a default pixel value to respective pixels of the first subset of the pixels for which image data has not been received and may program image data to respective pixels of the first subset of the pixels for which image data has been received.
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公开(公告)号：US20230410750A1
公开(公告)日：2023-12-21
申请号：US18239673
申请日：2023-08-29
Applicant: Apple Inc.
Inventor： Yingkan Lin , Tien-Chien Kuo , Bilin Wang , Kanghoon Jeon , Ivan Knez , Chun-Yao Huang
IPC: G09G3/3258 , G09G3/32
CPC classification number: G09G3/3258 , G09G3/32 , G09G2350/00 , G09G2300/0842 , G09G2320/064 , G09G2310/0243 , G09G3/3275
Abstract: A pixel circuit for an electronic display may include a memory to store a digital data signal indicative of a value within a data range. The pixel circuit may also include a light-emitting diode to emit light based at least in part on the digital data signal. The pixel circuit may also include an initialization transistor to initialize the pixel circuit before the light-emitting diode emits light and a driving transistor to activate based at least in part on the digital data signal.
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Patent Agency Ranking
公开(公告)号：US11527209B2
公开(公告)日：2022-12-13
申请号：US17196759
申请日：2021-03-09
Applicant: Apple Inc.
Inventor： Bilin Wang , Tien-Chien Kuo , Kanghoon Jeon , Chun-Yao Huang
IPC: G09G3/30 , G09G3/3291 , G09G5/397 , G09G3/36
Abstract: A display system may include a memory external to a pixel that stores a first digital data value, a memory internal to the pixel that stores a second digital data signal, where a combination of the first digital data signal and the second digital data signal may indicate a target gray level assigned to the pixel for a particular image frame. The pixel may be driven for a first duration of time according to the first digital data signal and for a second duration of time according to the second digital data signal.
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公开(公告)号：US12175943B2
公开(公告)日：2024-12-24
申请号：US17949949
申请日：2022-09-21
Applicant: Apple Inc.
Inventor： Bilin Wang , Tien-Chien Kuo , Kanghoon Jeon , Chun-Yao Huang
IPC: G09G3/30 , G09G3/3291 , G09G3/36 , G09G5/397
Abstract: A display system may include a memory external to a pixel that stores a first digital data value, a memory internal to the pixel that stores a second digital data signal, where a combination of the first digital data signal and the second digital data signal may indicate a target gray level assigned to the pixel for a particular image frame. The pixel may be driven for a first duration of time according to the first digital data signal and for a second duration of time according to the second digital data signal.
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公开(公告)号：US20240096294A1
公开(公告)日：2024-03-21
申请号：US18353622
申请日：2023-07-17
Applicant: Apple Inc.
Inventor： Denis M Darmon , Kanghoon Jeon , Jose A Dominguez-Caballero , Bilin Wang
CPC classification number: G09G3/346 , G02B26/0833 , G09G2320/0233 , G09G2320/0626 , G09G2330/021 , G09G2370/00
Abstract: A device may include an electronic display to display image frames. The display may include illuminators that generate light and mirrors that selectively direct the light to pixel locations based bitplanes that set the arrangement of the mirrors. Additionally, the device may include duty cycle balancing circuitry that generates and provides duty cycle balancing signals to the electronic display. In response to the duty cycle balancing signals, the electronic display is implements balancing on bitplanes during at least a first portion of off periods during the image frames and implements balancing off bitplanes during at least a second portion of the off periods such that, in the aggregate, a ratio of respective on times of the mirrors to respective off times of the mirrors is balanced across the image frames during the off periods.
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公开(公告)号：US20210304682A1
公开(公告)日：2021-09-30
申请号：US17196759
申请日：2021-03-09
Applicant: Apple Inc.
Inventor： Bilin Wang , Tien-Chien Kuo , Kanghoon Jeon , Chun-Yao Huang
IPC: G09G3/3291 , G09G3/36 , G09G5/397
Abstract: A display system may include a memory external to a pixel that stores a first digital data value, a memory internal to the pixel that stores a second digital data signal, where a combination of the first digital data signal and the second digital data signal may indicate a target gray level assigned to the pixel for a particular image frame. The pixel may be driven for a first duration of time according to the first digital data signal and for a second duration of time according to the second digital data signal.
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公开(公告)号：US12112715B2
公开(公告)日：2024-10-08
申请号：US18353622
申请日：2023-07-17
Applicant: Apple Inc.
Inventor： Denis M Darmon , Kanghoon Jeon , Jose A Dominguez-Caballero , Bilin Wang
CPC classification number: G09G3/346 , G02B26/0833 , G09G2320/0233 , G09G2320/0626 , G09G2330/021 , G09G2370/00
Abstract: A device may include an electronic display to display image frames. The display may include illuminators that generate light and mirrors that selectively direct the light to pixel locations based bitplanes that set the arrangement of the mirrors. Additionally, the device may include duty cycle balancing circuitry that generates and provides duty cycle balancing signals to the electronic display. In response to the duty cycle balancing signals, the electronic display is implements balancing on bitplanes during at least a first portion of off periods during the image frames and implements balancing off bitplanes during at least a second portion of the off periods such that, in the aggregate, a ratio of respective on times of the mirrors to respective off times of the mirrors is balanced across the image frames during the off periods.
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