公开(公告)号：US12052038B2

公开(公告)日：2024-07-30

申请号：US18302513

申请日：2023-04-18

Applicant: Apple Inc.

Inventor： Tyson J. Bergland ,  Karthik Ramani ,  Stephan Lachowsky ,  Justin A. Hensley ,  Davoud A. Jamshidi

IPC: H03M7/30 ,  H04N19/176 ,  H04N19/182

CPC classification number: H03M7/3059 ,  H04N19/176 ,  H04N19/182

Abstract: Techniques are disclosed relating to compression of pixel data using different quantization for different regions of a block of pixels being compressed. In some embodiments, compression circuitry is configured to determine, for multiple components included in pixels of the block of pixels being compressed, respective smallest and greatest component values in respective regions of the block of pixels. The compression circuitry may determine, based on the determined smallest and greatest component values, to use a first number of bits to represent delta values relative to a base value for a first component in a first region and a second, different number of bits to represent delta values relative to a base value for a second component in the first region. The compression circuitry may then quantize delta values for the first and second components of pixels in the first region of the block of pixels using the determined first and second numbers of bits. In some embodiments, the compression circuitry determines whether to provide cross-component bit sharing within a region.

公开(公告)号：US20230253979A1

公开(公告)日：2023-08-10

申请号：US18302513

申请日：2023-04-18

Applicant: Apple Inc.

Inventor： Tyson J. Bergland ,  Karthik Ramani ,  Stephan Lachowsky ,  Justin A. Hensley ,  Davoud A. Jamshidi

IPC: H03M7/30 ,  H04N19/182 ,  H04N19/176

CPC classification number: H03M7/3059 ,  H04N19/182 ,  H04N19/176

Abstract: Techniques are disclosed relating to compression of pixel data using different quantization for different regions of a block of pixels being compressed. In some embodiments, compression circuitry is configured to determine, for multiple components included in pixels of the block of pixels being compressed, respective smallest and greatest component values in respective regions of the block of pixels. The compression circuitry may determine, based on the determined smallest and greatest component values, to use a first number of bits to represent delta values relative to a base value for a first component in a first region and a second, different number of bits to represent delta values relative to a base value for a second component in the first region. The compression circuitry may then quantize delta values for the first and second components of pixels in the first region of the block of pixels using the determined first and second numbers of bits. In some embodiments, the compression circuitry determines whether to provide cross-component bit sharing within a region.

公开(公告)号：US11664816B2

公开(公告)日：2023-05-30

申请号：US16855540

申请日：2020-04-22

Applicant: Apple Inc.

Inventor： Tyson J. Bergland ,  Karthik Ramani ,  Stephan Lachowsky ,  Justin A. Hensley ,  Davoud A. Jamshidi

IPC: H03M7/30 ,  H04N19/182 ,  H04N19/176

CPC classification number: H03M7/3059 ,  H04N19/176 ,  H04N19/182

Abstract: Techniques are disclosed relating to compression of pixel data using different quantization for different regions of a block of pixels being compressed. In some embodiments, compression circuitry is configured to determine, for multiple components included in pixels of the block of pixels being compressed, respective smallest and greatest component values in respective regions of the block of pixels. The compression circuitry may determine, based on the determined smallest and greatest component values, to use a first number of bits to represent delta values relative to a base value for a first component in a first region and a second, different number of bits to represent delta values relative to a base value for a second component in the first region. The compression circuitry may then quantize delta values for the first and second components of pixels in the first region of the block of pixels using the determined first and second numbers of bits. In some embodiments, the compression circuitry determines whether to provide cross-component bit sharing within a region.

公开(公告)号：US20240429938A1

公开(公告)日：2024-12-26

申请号：US18755302

申请日：2024-06-26

Applicant: Apple Inc.

Inventor： Tyson J. Bergland ,  Karthik Ramani ,  Stephan Lachowsky ,  Justin A. Hensley ,  Davoud A. Jamshidi

IPC: H03M7/30 ,  H04N19/176 ,  H04N19/182

Abstract: Techniques are disclosed relating to compression of pixel data using different quantization for different regions of a block of pixels being compressed. In some embodiments, compression circuitry is configured to determine, for multiple components included in pixels of the block of pixels being compressed, respective smallest and greatest component values in respective regions of the block of pixels. The compression circuitry may determine, based on the determined smallest and greatest component values, to use a first number of bits to represent delta values relative to a base value for a first component in a first region and a second, different number of bits to represent delta values relative to a base value for a second component in the first region. The compression circuitry may then quantize delta values for the first and second components of pixels in the first region of the block of pixels using the determined first and second numbers of bits. In some embodiments, the compression circuitry determines whether to provide cross-component bit sharing within a region.

公开(公告)号：US20210336632A1

公开(公告)日：2021-10-28

申请号：US16855540

申请日：2020-04-22

Applicant: Apple Inc.

Inventor： Tyson J. Bergland ,  Karthik Ramani ,  Stephan Lachowsky ,  Justin A. Hensley ,  Davoud A. Jamshidi

IPC: H03M7/30 ,  H04N19/176 ,  H04N19/182

Abstract: Techniques are disclosed relating to compression of pixel data using different quantization for different regions of a block of pixels being compressed. In some embodiments, compression circuitry is configured to determine, for multiple components included in pixels of the block of pixels being compressed, respective smallest and greatest component values in respective regions of the block of pixels. The compression circuitry may determine, based on the determined smallest and greatest component values, to use a first number of bits to represent delta values relative to a base value for a first component in a first region and a second, different number of bits to represent delta values relative to a base value for a second component in the first region. The compression circuitry may then quantize delta values for the first and second components of pixels in the first region of the block of pixels using the determined first and second numbers of bits. In some embodiments, the compression circuitry determines whether to provide cross-component bit sharing within a region.