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公开(公告)号:US20220377352A1
公开(公告)日:2022-11-24
申请号:US17816136
申请日:2022-07-29
Applicant: Apple Inc.
Inventor: Tyson J. Bergland , Anthony P. DeLaurier , Karthik Ramani , Stephan Lachowsky
IPC: H04N19/182 , H03M7/30
Abstract: Techniques are disclosed relating to data compression. In some embodiments, compression circuitry determines, at least partially in parallel for multiple different lossless compression techniques, amounts of data needed to represent, using a given lossless compression technique of the multiple lossless compression techniques, individual pixels in a set of pixels being compressed. The compression techniques may include neighbor, origin, and gradient techniques, for example. The compression circuitry may select one of the compression techniques based on comparison, among the compression techniques, of sums of: the determined amount of data for an individual pixel for a given lossless compression technique and compression metadata size for a given lossless compression technique. The compression circuitry may generate and store information that encodes values for the set of pixels using the selected compression technique.
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公开(公告)号:US11405622B2
公开(公告)日:2022-08-02
申请号:US16855459
申请日:2020-04-22
Applicant: Apple Inc.
Inventor: Tyson J. Bergland , Anthony P. DeLaurier , Karthik Ramani , Stephan Lachowsky
IPC: H04N11/02 , H04N19/182 , H03M7/30
Abstract: Techniques are disclosed relating to data compression. In some embodiments, compression circuitry determines, at least partially in parallel for multiple different lossless compression techniques, a number of bits needed to represent a least compressible pixel, using that technique, in a set of pixels being compressed. The compression techniques may include neighbor, origin, and gradient techniques, for example. The compression circuitry may select one of the compression techniques based on the determined numbers of bits for the multiple compression techniques and corresponding header sizes. In some embodiments, the compression circuitry determines, for multiple regions of pixels in the set of pixels, for ones of the compression techniques, a region number of bits needed to represent a least compressible pixel, using that technique. The selection of a compression technique may be further based on region numbers of bits.
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公开(公告)号:US20210337218A1
公开(公告)日:2021-10-28
申请号:US16855459
申请日:2020-04-22
Applicant: Apple Inc.
Inventor: Tyson J. Bergland , Anthony P. DeLaurier , Karthik Ramani , Stephan Lachowsky
IPC: H04N19/182 , H03M7/30
Abstract: Techniques are disclosed relating to data compression. In some embodiments, compression circuitry determines, at least partially in parallel for multiple different lossless compression techniques, a number of bits needed to represent a least compressible pixel, using that technique, in a set of pixels being compressed. The compression techniques may include neighbor, origin, and gradient techniques, for example. The compression circuitry may select one of the compression techniques based on the determined numbers of bits for the multiple compression techniques and corresponding header sizes. In some embodiments, the compression circuitry determines, for multiple regions of pixels in the set of pixels, for ones of the compression techniques, a region number of bits needed to represent a least compressible pixel, using that technique. The selection of a compression technique may be further based on region numbers of bits.
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公开(公告)号:US12052038B2
公开(公告)日:2024-07-30
申请号:US18302513
申请日:2023-04-18
Applicant: Apple Inc.
Inventor: Tyson J. Bergland , Karthik Ramani , Stephan Lachowsky , Justin A. Hensley , Davoud A. Jamshidi
IPC: H03M7/30 , H04N19/176 , H04N19/182
CPC classification number: H03M7/3059 , H04N19/176 , H04N19/182
Abstract: Techniques are disclosed relating to compression of pixel data using different quantization for different regions of a block of pixels being compressed. In some embodiments, compression circuitry is configured to determine, for multiple components included in pixels of the block of pixels being compressed, respective smallest and greatest component values in respective regions of the block of pixels. The compression circuitry may determine, based on the determined smallest and greatest component values, to use a first number of bits to represent delta values relative to a base value for a first component in a first region and a second, different number of bits to represent delta values relative to a base value for a second component in the first region. The compression circuitry may then quantize delta values for the first and second components of pixels in the first region of the block of pixels using the determined first and second numbers of bits. In some embodiments, the compression circuitry determines whether to provide cross-component bit sharing within a region.
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公开(公告)号:US11843788B2
公开(公告)日:2023-12-12
申请号:US17816136
申请日:2022-07-29
Applicant: Apple Inc.
Inventor: Tyson J. Bergland , Anthony P. DeLaurier , Karthik Ramani , Stephan Lachowsky
IPC: H04N11/02 , H04N19/182 , H03M7/30
CPC classification number: H04N19/182 , H03M7/3059
Abstract: Techniques are disclosed relating to data compression. In some embodiments, compression circuitry determines, at least partially in parallel for multiple different lossless compression techniques, amounts of data needed to represent, using a given lossless compression technique of the multiple lossless compression techniques, individual pixels in a set of pixels being compressed. The compression techniques may include neighbor, origin, and gradient techniques, for example. The compression circuitry may select one of the compression techniques based on comparison, among the compression techniques, of sums of: the determined amount of data for an individual pixel for a given lossless compression technique and compression metadata size for a given lossless compression technique. The compression circuitry may generate and store information that encodes values for the set of pixels using the selected compression technique.
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公开(公告)号:US20220358895A1
公开(公告)日:2022-11-10
申请号:US17752651
申请日:2022-05-24
Applicant: Apple Inc.
Inventor: Mahesh B. Chappalli , Christopher P. Tann , Peter F. Holland , Guy Côté , Stephan Lachowsky
Abstract: An electronic display pipeline may process image data for display on an electronic display. The electronic display pipeline may include burn-in compensation statistics collection circuitry and burn-in compensation circuitry. The burn-in compensation statistics collection circuitry may collect image statistics based at least in part on the image data. The statistics may estimate a likely amount of non-uniform aging of the sub-pixels of the electronic display. The burn-in compensation circuitry may apply a gain to sub-pixels of the image data to account for non-uniform aging of corresponding sub-pixels of the electronic display. The applied gain may be based at least in part on the image statistics collected by the burn-in compensation statistics collection circuitry.
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公开(公告)号:US11823642B2
公开(公告)日:2023-11-21
申请号:US17752651
申请日:2022-05-24
Applicant: Apple Inc.
Inventor: Mahesh B. Chappalli , Christopher P. Tann , Peter F. Holland , Guy Côté , Stephan Lachowsky
CPC classification number: G09G5/005 , G09G3/006 , G09G3/22 , G09G5/001 , G09G5/02 , G09G2320/046 , G09G2320/048 , G09G2320/0626 , G09G2320/0673 , G09G2330/10
Abstract: An electronic display pipeline may process image data for display on an electronic display. The electronic display pipeline may include burn-in compensation statistics collection circuitry and burn-in compensation circuitry. The burn-in compensation statistics collection circuitry may collect image statistics based at least in part on the image data. The statistics may estimate a likely amount of non-uniform aging of the sub-pixels of the electronic display. The burn-in compensation circuitry may apply a gain to sub-pixels of the image data to account for non-uniform aging of corresponding sub-pixels of the electronic display. The applied gain may be based at least in part on the image statistics collected by the burn-in compensation statistics collection circuitry.
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公开(公告)号:US20230253979A1
公开(公告)日:2023-08-10
申请号:US18302513
申请日:2023-04-18
Applicant: Apple Inc.
Inventor: Tyson J. Bergland , Karthik Ramani , Stephan Lachowsky , Justin A. Hensley , Davoud A. Jamshidi
IPC: H03M7/30 , H04N19/182 , H04N19/176
CPC classification number: H03M7/3059 , H04N19/182 , H04N19/176
Abstract: Techniques are disclosed relating to compression of pixel data using different quantization for different regions of a block of pixels being compressed. In some embodiments, compression circuitry is configured to determine, for multiple components included in pixels of the block of pixels being compressed, respective smallest and greatest component values in respective regions of the block of pixels. The compression circuitry may determine, based on the determined smallest and greatest component values, to use a first number of bits to represent delta values relative to a base value for a first component in a first region and a second, different number of bits to represent delta values relative to a base value for a second component in the first region. The compression circuitry may then quantize delta values for the first and second components of pixels in the first region of the block of pixels using the determined first and second numbers of bits. In some embodiments, the compression circuitry determines whether to provide cross-component bit sharing within a region.
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公开(公告)号:US11664816B2
公开(公告)日:2023-05-30
申请号:US16855540
申请日:2020-04-22
Applicant: Apple Inc.
Inventor: Tyson J. Bergland , Karthik Ramani , Stephan Lachowsky , Justin A. Hensley , Davoud A. Jamshidi
IPC: H03M7/30 , H04N19/182 , H04N19/176
CPC classification number: H03M7/3059 , H04N19/176 , H04N19/182
Abstract: Techniques are disclosed relating to compression of pixel data using different quantization for different regions of a block of pixels being compressed. In some embodiments, compression circuitry is configured to determine, for multiple components included in pixels of the block of pixels being compressed, respective smallest and greatest component values in respective regions of the block of pixels. The compression circuitry may determine, based on the determined smallest and greatest component values, to use a first number of bits to represent delta values relative to a base value for a first component in a first region and a second, different number of bits to represent delta values relative to a base value for a second component in the first region. The compression circuitry may then quantize delta values for the first and second components of pixels in the first region of the block of pixels using the determined first and second numbers of bits. In some embodiments, the compression circuitry determines whether to provide cross-component bit sharing within a region.
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公开(公告)号:US20190080666A1
公开(公告)日:2019-03-14
申请号:US15861215
申请日:2018-01-03
Applicant: Apple Inc.
Inventor: Mahesh B. Chappalli , Christopher P. Tann , Peter F. Holland , Guy Côté , Stephan Lachowsky
Abstract: An electronic display pipeline may process image data for display on an electronic display. The electronic display pipeline may include burn-in compensation statistics collection circuitry and burn-in compensation circuitry. The burn-in compensation statistics collection circuitry may collect image statistics based at least in part on the image data. The statistics may estimate a likely amount of non-uniform aging of the sub-pixels of the electronic display. The burn-in compensation circuitry may apply a gain to sub-pixels of the image data to account for non-uniform aging of corresponding sub-pixels of the electronic display. The applied gain may be based at least in part on the image statistics collected by the burn-in compensation statistics collection circuitry.
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