Control of series-parallel mode (SPM) clamped flyback converter

    公开(公告)号:US10770965B2

    公开(公告)日:2020-09-08

    申请号:US16365100

    申请日:2019-03-26

    Applicant: Apple Inc.

    Abstract: This disclosure describes a flyback converter with a series-parallel mode (SPM) active clamp. The active clamp, coupled in parallel with the primary coil, may include a clamp switch, two or more snubber capacitors, and associated diodes. The active clamp may be configured to absorb and retain the leakage energy from the leakage inductance of the flyback converter. The clamp switch may be turned on selectively as the primary switch approaches one of a plurality peak values to adjust frequencies of the switching devices. With the active clamp circuit, the flyback converter may first re-capture the leakage energy in the active clamp circuit and then recover it back to the power source.

    Control of Series-Parallel Mode (SPM) Clamped Flyback Converter

    公开(公告)号:US20180205311A1

    公开(公告)日:2018-07-19

    申请号:US15847008

    申请日:2017-12-19

    Applicant: Apple Inc.

    Abstract: This disclosure describes a flyback converter with a series-parallel mode (SPM) active clamp. The active clamp, coupled in parallel with the primary coil, may include a clamp switch, two or more snubber capacitors, and associated diodes. The active clamp may be configured to absorb and retain the leakage energy from the leakage inductance of the flyback converter. The clamp switch may be turned on selectively as the primary switch approaches one of a plurality peak values to adjust frequencies of the switching devices. With the active clamp circuit, the flyback converter may first re-capture the leakage energy in the active clamp circuit and then recover it back to the power source.

    Voltage slew rate limiters for transformer-based switching power converters

    公开(公告)号:US10855192B1

    公开(公告)日:2020-12-01

    申请号:US16538963

    申请日:2019-08-13

    Applicant: Apple Inc.

    Abstract: A transformer-based switching power converter can include a slew rate limiter coupled to the switching stage and configured to limit rate of change of voltage across one or more switching devices of the switching stage, thereby reducing voltage spikes appearing on the secondary winding. The slew rate limiter may be configured to selectively operate to limit rate of change of voltage across one or more switching devices of the switching stage during startup of the switching stage, upon waking from burst mode, or at any time when zero voltage switching of the one or more switching devices is unavailable. The slew rate limiter can include at least one circuit element configured to selectively alter a time constant of a gate drive circuit of at least one switching device in the switching stage to increase a turn-on transition time of the at least one switching device.

    Common mode noise cancelation in power converters

    公开(公告)号:US10243453B1

    公开(公告)日:2019-03-26

    申请号:US15847173

    申请日:2017-12-19

    Applicant: Apple Inc.

    Abstract: This disclosure describes a circuit, a method, and a system to mitigate common mode noise in a power converter. The converter may include a transformer that isolates input and output terminals with primary and secondary windings. The transformer may further include an auxiliary winding coupled in anti-parallel with a secondary winding. The auxiliary winding may inject a common mode current through a compensation capacitor and a Y-capacitor to cancel a common mode current induced at the secondary side to the primary side. The converter may include a coupler circuit that provides a varying impedance at different frequencies to facilitate the current injection and allocate voltages between the compensation capacitor and the Y-capacitor. A voltage clamping circuit may be employed to protect a coupler capacitor from overvoltage.

    LOW POWER PFC CONVERTER
    5.
    发明公开

    公开(公告)号:US20240039398A1

    公开(公告)日:2024-02-01

    申请号:US17814902

    申请日:2022-07-26

    Applicant: Apple Inc.

    CPC classification number: H02M1/4225 H02M3/33507 H02M1/0095 H02M1/0032

    Abstract: A power converter can include an input PFC stage that receives a rectified input voltage coupled to a flyback stage including a center-tapped primary winding magnetically coupled to a secondary winding and a main switch coupled in series with the primary winding. The output of the PFC stage can be coupled to the center tap of the primary winding, and an output of the power converter can be coupled to the secondary winding of the flyback stage. The converter can further include control circuitry coupled to the main switch and an auxiliary switch in the PFC stage that operates the main switch to regulate an output voltage of the power converter, selectively enables the auxiliary switch responsive to a low line voltage condition at the input of the power converter, and operates the enabled auxiliary switch synchronously with the main switch.

    Control of Series-Parallel Mode (SPM) Clamped Flyback Converter

    公开(公告)号:US20190222113A1

    公开(公告)日:2019-07-18

    申请号:US16365100

    申请日:2019-03-26

    Applicant: Apple Inc.

    Abstract: This disclosure describes a flyback converter with a series-parallel mode (SPM) active clamp. The active clamp, coupled in parallel with the primary coil, may include a clamp switch, two or more snubber capacitors, and associated diodes. The active clamp may be configured to absorb and retain the leakage energy from the leakage inductance of the flyback converter. The clamp switch may be turned on selectively as the primary switch approaches one of a plurality peak values to adjust frequencies of the switching devices. With the active clamp circuit, the flyback converter may first re-capture the leakage energy in the active clamp circuit and then recover it back to the power source.

    Common Mode Noise Cancelation in Power Converters

    公开(公告)号:US20190097530A1

    公开(公告)日:2019-03-28

    申请号:US15847173

    申请日:2017-12-19

    Applicant: Apple Inc.

    Abstract: This disclosure describes a circuit, a method, and a system to mitigate common mode noise in a power converter. The converter may include a transformer that isolates input and output terminals with primary and secondary windings. The transformer may further include an auxiliary winding coupled in anti-parallel with a secondary winding. The auxiliary winding may inject a common mode current through a compensation capacitor and a Y-capacitor to cancel a common mode current induced at the secondary side to the primary side. The converter may include a coupler circuit that provides a varying impedance at different frequencies to facilitate the current injection and allocate voltages between the compensation capacitor and the Y-capacitor. A voltage clamping circuit may be employed to protect a coupler capacitor from overvoltage.

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