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    Node Encoding for Spatially-Organized Ray Tracing Acceleration Data Structure
    1.
    发明申请
    Node Encoding for Spatially-Organized Ray Tracing Acceleration Data Structure 有权

    公开(公告)号：US20220375155A1

    公开(公告)日：2022-11-24

    申请号：US17817742

    申请日：2022-08-05

    Applicant: Apple Inc.

    Inventor： Ali Rabbani Rankouhi ,  Christopher A. Burns ,  Justin A. Hensley ,  Luca Iuliano ,  Jonathan M. Redshaw

    IPC: G06T15/06 ,  G06T17/00

    Abstract: Disclosed techniques relate to acceleration data structure for ray intersection testing. In some embodiments, storage circuitry stores node data for a spatially organized acceleration data structure, including to store the following node information for a given node: origin coordinates for the node and, for a given child node of multiple child nodes, child information that includes: quantized bounding region information for a bounding region corresponding to the child node, where the quantized bounding region information encodes bounding region coordinates as offsets relative to the origin coordinates. Traversal circuitry may traverse multiple nodes of the data structure and determine whether a ray intersects a bounding region indicated by given a node of the data structure based on the node information. Disclosed techniques may provide substantial improvements to performance, data size, and power consumption.

    Ray intersect circuitry with parallel ray testing
    5.
    发明授权
    Ray intersect circuitry with parallel ray testing 有权

    公开(公告)号：US11367242B2

    公开(公告)日：2022-06-21

    申请号：US17103433

    申请日：2020-11-24

    Applicant: Apple Inc.

    Inventor： Ali Rabbani Rankouhi ,  Christopher A. Burns ,  Justin A. Hensley ,  Luca Iuliano ,  Jonathan M. Redshaw

    IPC: G06T15/06 ,  G06T15/00 ,  G06T17/00

    Abstract: Disclosed techniques relate to ray intersection processing for ray tracing. In some embodiments, ray intersection circuitry traverses a spatially organized acceleration data structure and includes bounding region circuitry configured to test, in parallel, whether a ray intersects multiple different bounding regions indicated by a node of the data structure. Shader circuitry may execute a ray intersect instruction to invoke traversal by the ray intersect circuitry and the traversal may generate intersection results. The shader circuitry may shade intersected primitives based on the intersection results. Disclosed techniques that share processing between intersection circuitry and shader processors may improve performance, reduce power consumption, or both, relative to traditional techniques.

    Ray Intersect Circuitry with Parallel Ray Testing
    7.
    发明申请
    Ray Intersect Circuitry with Parallel Ray Testing 有权

    公开(公告)号：US20220036639A1

    公开(公告)日：2022-02-03

    申请号：US17103433

    申请日：2020-11-24

    Applicant: Apple Inc.

    Inventor： Ali Rabbani Rankouhi ,  Christopher A. Burns ,  Justin A. Hensley ,  Luca Iuliano ,  Jonathan M. Redshaw

    IPC: G06T15/06 ,  G06T15/00 ,  G06T17/00

    Abstract: Disclosed techniques relate to ray intersection processing for ray tracing. In some embodiments, ray intersection circuitry traverses a spatially organized acceleration data structure and includes bounding region circuitry configured to test, in parallel, whether a ray intersects multiple different bounding regions indicated by a node of the data structure. Shader circuitry may execute a ray intersect instruction to invoke traversal by the ray intersect circuitry and the traversal may generate intersection results. The shader circuitry may shade intersected primitives based on the intersection results. Disclosed techniques that share processing between intersection circuitry and shader processors may improve performance, reduce power consumption, or both, relative to traditional techniques.

    SIMD Group Formation Techniques for Primitive Testing associated with Ray Intersect Traversal
    9.
    发明申请
    SIMD Group Formation Techniques for Primitive Testing associated with Ray Intersect Traversal 有权

    公开(公告)号：US20220036638A1

    公开(公告)日：2022-02-03

    申请号：US17103406

    申请日：2020-11-24

    Applicant: Apple Inc.

    Inventor： Ali Rabbani Rankouhi ,  Christopher A. Burns ,  Justin A. Hensley ,  Luca Iuliano ,  Jonathan M. Redshaw

    IPC: G06T15/06 ,  G06T15/00

    Abstract: Disclosed techniques relate to primitive testing associated with ray intersection processing for ray tracing. In some embodiments, shader circuitry executes a first SIMD group that includes a ray intersect instruction for a set of rays. Ray intersect circuitry traverses, in response to the ray intersect instruction, multiple nodes in a spatially organized acceleration data structure (ADS). In response to reaching a node of the ADS that indicates one or more primitives, the apparatus forms a second SIMD group that executes one or more instructions to determine whether a set of rays that have reached the node intersect the one or more primitives. The shader circuitry may execute the first SIMD group to shade one or more primitives that are indicated as intersected based on results of execution of the second SIMD group. Thus, disclosed techniques may use both dedicated ray intersect circuitry and dynamically formed SIMD groups executed by shader processors to detect ray intersection.

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