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公开(公告)号：US11954492B1
公开(公告)日：2024-04-09
申请号：US18054401
申请日：2022-11-10
Applicant: Apple Inc.
Inventor： Benjiman L. Goodman , Dzung Q. Vu , Robert Kenney
IPC: G06F9/38
CPC classification number: G06F9/3838 , G06F9/3836 , G06F9/3867 , G06F9/3887 , G06F9/3888
Abstract: Techniques are disclosed relating to channel stalls or deactivations based on the latency of prior operations. In some embodiments, a processor includes a plurality of channel pipelines for a plurality of channels and a plurality of execution pipelines shared by the channel pipelines and configured to perform different types of operations provided by the channel pipelines. First scheduler circuitry may assign threads to channels and second scheduler circuitry may assign an operation from a given channel to a given execution pipeline based on decode of an operation for that channel. Dependency circuitry may, for a first operation that depends on a prior operation that uses one of the execution pipelines, determine, based on status information for the prior operation from the one of the execution pipelines, whether to stall the first operation or to deactivate a thread that includes the first operation from its assigned channel.
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Patent Agency Ranking
公开(公告)号：US20240095035A1
公开(公告)日：2024-03-21
申请号：US18054401
申请日：2022-11-10
Applicant: Apple Inc.
Inventor： Benjiman L. Goodman , Dzung Q. Vu , Robert Kenney
IPC: G06F9/38
CPC classification number: G06F9/3838 , G06F9/3867 , G06F9/3887
Abstract: Techniques are disclosed relating to channel stalls or deactivations based on the latency of prior operations. In some embodiments, a processor includes a plurality of channel pipelines for a plurality of channels and a plurality of execution pipelines shared by the channel pipelines and configured to perform different types of operations provided by the channel pipelines. First scheduler circuitry may assign threads to channels and second scheduler circuitry may assign an operation from a given channel to a given execution pipeline based on decode of an operation for that channel. Dependency circuitry may, for a first operation that depends on a prior operation that uses one of the execution pipelines, determine, based on status information for the prior operation from the one of the execution pipelines, whether to stall the first operation or to deactivate a thread that includes the first operation from its assigned channel.
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公开(公告)号：US20160055833A1
公开(公告)日：2016-02-25
申请号：US14463271
申请日：2014-08-19
Applicant: Apple Inc.
Inventor： Andrew M. Havlir , Michael A. Geary , Robert Kenney
IPC: G09G5/399
CPC classification number: G09G5/399 , G06T1/60 , G09G5/393 , G09G2330/021
Abstract: Embodiments of a unified shading controller are disclosed. The embodiments may provide a first functional unit configured to send a write request to a second functional unit. The write request may include data and the data may include one or more control bits. Upon receiving the write request, the second functional unit may check the one or more control bits, and hold the data in a given queue dependent upon the control bits.
Abstract translation: 公开了统一阴影控制器的实施例。 实施例可以提供被配置为向第二功能单元发送写入请求的第一功能单元。 写请求可以包括数据，并且数据可以包括一个或多个控制位。 在接收到写请求时，第二功能单元可以检查一个或多个控制位，并且根据控制位保持给定队列中的数据。
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公开(公告)号：US10445852B2
公开(公告)日：2019-10-15
申请号：US15388804
申请日：2016-12-22
Applicant: Apple Inc.
Inventor： Terence M. Potter , Robert Kenney , Aaftab A. Munshi , Justin A. Hensley , Richard W. Schreyer
Abstract: Techniques are disclosed relating to a hardware-supported flexible data structure for graphics processing. In some embodiments, dimensions of the data structure are configurable in an X direction, a Y direction, a number of samples per pixel, and an amount of data per sample. In some embodiments, these attributes are configurable using hardware registers. In some embodiments, the data structure is persistent across a tile being processed such that local memory context is accessible to both rendering threads of a render pass and mid-render compute threads.
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公开(公告)号：US20180182058A1
公开(公告)日：2018-06-28
申请号：US15388804
申请日：2016-12-22
Applicant: Apple Inc.
Inventor： Terence M. Potter , Robert Kenney , Aaftab A. Munshi , Justin A. Hensley , Richard W. Schreyer
Abstract: Techniques are disclosed relating to a hardware-supported flexible data structure for graphics processing. In some embodiments, dimensions of the data structure are configurable in an X direction, a Y direction, a number of samples per pixel, and an amount of data per sample. In some embodiments, these attributes are configurable using hardware registers. In some embodiments, the data structure is persistent across a tile being processed such that local memory context is accessible to both rendering threads of a render pass and mid-render compute threads.
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公开(公告)号：US09437172B2
公开(公告)日：2016-09-06
申请号：US14463271
申请日：2014-08-19
Applicant: Apple Inc.
Inventor： Andrew M. Havlir , Michael A. Geary , Robert Kenney
CPC classification number: G09G5/399 , G06T1/60 , G09G5/393 , G09G2330/021
Abstract: Embodiments of a unified shading controller are disclosed. The embodiments may provide a first functional unit configured to send a write request to a second functional unit. The write request may include data and the data may include one or more control bits. Upon receiving the write request, the second functional unit may check the one or more control bits, and hold the data in a given queue dependent upon the control bits.
Abstract translation: 公开了统一阴影控制器的实施例。 实施例可以提供被配置为向第二功能单元发送写入请求的第一功能单元。 写请求可以包括数据，并且数据可以包括一个或多个控制位。 在接收到写请求时，第二功能单元可以检查一个或多个控制位，并且根据控制位保持给定队列中的数据。
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