公开(公告)号：US10923023B1

公开(公告)日：2021-02-16

申请号：US15380860

申请日：2016-12-15

Applicant: Apple Inc.

Inventor： Andreas Bibl ,  Xia Li ,  John A. Higginson ,  Vaibhav D. Patel ,  Kapil V. Sakariya ,  Imran Hashim ,  Tore Nauta ,  Thomas Charisoulis

IPC: G09G3/32 ,  H01L27/32

Abstract: Hybrid chiplets, display backplanes, and displays with integrated hybrid chiplets are described. In an embodiment, a hybrid chiplet includes a micro LED chiplet stacked on a micro driver chiplet that includes at least one drive transistor and a bottom side including a plurality of bottom chiplet contacts for electrical connection with a display backplane.

公开(公告)号：US20230087088A1

公开(公告)日：2023-03-23

申请号：US17894935

申请日：2022-08-24

Applicant: Apple Inc.

Inventor： Mahdi Farrokh Baroughi ,  Sandeep Chalasani ,  Xiang Lu ,  Anurag Mehta ,  Hopil Bae ,  Chaohao Wang ,  Rajesh Velayuthan ,  Steven E. Molesa ,  Yaser Azizi ,  Young Don Bae ,  Sunmin Jang ,  Haitao Li ,  Hari P. Paudel ,  Anatole Huang ,  Tyler R. Kakuda ,  David A. Doyle ,  Wei H. Yao ,  Majid Gharghi ,  Vaibhav D. Patel

IPC: H01L27/15 ,  H01L33/62 ,  G09G3/32 ,  H01L33/38

Abstract: A display may be formed by an array of light-emitting diodes mounted to the surface of a display substrate. The light-emitting diodes may be inorganic light-emitting diodes formed from separate crystalline semiconductor structures. An array of pixel control circuits may be used to control light emission from the light-emitting diodes. Each pixel control circuit may be configured to control one or more respective passive matrices. To control partial pixel cells in the display, a donor pixel control circuit in a partial pixel cell may control the pixels in a receptor partial pixel cell without a pixel control circuit. To mitigate the size of an inactive area of the display, fanout signal lines for the display may be formed in the light-emitting active area of the display. The fanout signal lines may be formed between a row of pixel control circuits and a bottom edge of the light-emitting active area.

公开(公告)号：US20210213587A1

公开(公告)日：2021-07-15

申请号：US17071865

申请日：2020-10-15

Applicant: Apple Inc.

Inventor： Vaibhav D. Patel ,  John P. Staton ,  Jonathan M. Manzano ,  Stephen P. Bathurst

IPC: B24B41/06 ,  B24B41/00

Abstract: Multi-port polishing fixture assemblies, pick and place bond heads, split holders, and conditioning methods are described. In an embodiment, a multi-port polishing fixture assembly includes a fixture base, a plurality of split holders fastenable to a perimeter surface with a plurality of kinematic plurality of kinematic clamps. The pick and place bond heads may be secured inside the plurality of split holders to reduce edge-fast polishing during conditioning of the distal bond surfaces of the pick and place bond heads.

公开(公告)号：US20190006329A1

公开(公告)日：2019-01-03

申请号：US16067865

申请日：2017-01-11

Applicant: Apple Inc.

Inventor： Imran Hashim ,  Vaibhav D. Patel ,  Hsin-Hua Hu ,  Kapil V. Sakariya ,  Ralph E. Kauffman

IPC: H01L25/075 ,  H01L33/62 ,  H01L33/44

Abstract: Display integration schemes are described for passivating LEDs and providing conductive terminal connections. In accordance with embodiments, a sidewall passivation layer is formed around the LEDs. The sidewall passivation layer may or may not be contained within a well structure. A top electrode layer is formed to electrically connect the LEDs to conductive terminal routing.