公开(公告)号：US20140308814A1

公开(公告)日：2014-10-16

申请号：US13862920

申请日：2013-04-15

Applicant: Applied Materials, Inc

Inventor： David Maxwell Gage ,  You Wang ,  Zhihong Wang ,  Wen-chiang Tu

IPC: H01L21/306 ,  C09G1/04 ,  H01L21/67

CPC classification number: C09G1/04 ,  B24B37/044 ,  H01L21/3212

Abstract: In one aspect, a substrate chemical mechanical polishing (CMP) method for copper-layered substrates is disclosed. The CMP method includes providing a substrate having a surface of copper, and pre-treating the surface containing copper with a first composition containing a carrier liquid, a corrosion inhibitor, and an oxidizer in a pre-treatment phase, and thereafter, polishing the surface with a slurry composition in a main polishing phase. CMP systems and compositions for CMP are provided, as are numerous other aspects.

Abstract translation: 一方面，公开了一种用于铜层基板的基板化学机械抛光（CMP）方法。 CMP方法包括提供具有铜表面的基底，并且在预处理阶段中用含有载体​​液体，腐蚀抑制剂和氧化剂的第一组合物预处理包含铜的表面，然后抛光表面 在主抛光阶段具有浆料组合物。 提供用于CMP的CMP系统和组合物，以及许多其它方面。

公开(公告)号：US20140315381A1

公开(公告)日：2014-10-23

申请号：US13866449

申请日：2013-04-19

Applicant: Applied Materials, Inc.

Inventor： You Wang ,  Wen-chiang Tu ,  Zhihong Wang

IPC: H01L21/768 ,  H01L21/67

CPC classification number: H01L21/768 ,  H01L21/3212 ,  H01L21/6776 ,  H01L21/76819 ,  H01L21/7684 ,  H01L21/76865 ,  H01L21/76873

Abstract: A stand-alone processing station of a semiconductor manufacturing system may be configured to fabricate interconnects on a semiconductor wafer. The stand-alone processing station may include a chemical mechanical polishing (CMP) module and an electro-chemical deposition (ECD) module. The CMP module may be configured to receive a semiconductor wafer from another processing station and selectively remove a first top layer from the received semiconductor wafer. The ECD module may be configured to receive a semiconductor wafer from the CMP module and fill interconnect features with metal. The CMP module may also be configured to receive a semiconductor wafer from the ECD module and selectively remove excess metal and a second top layer from the semiconductor wafer. Methods of forming an interconnect on a semiconductor wafer are also provided, as are other aspects.

Abstract translation: 半导体制造系统的独立处理站可以被配置为在半导体晶片上制造互连。 独立处理站可以包括化学机械抛光（CMP）模块和电化学沉积（ECD）模块。 CMP模块可以被配置为从另一个处理站接收半导体晶片，并从接收到的半导体晶片中选择性地去除第一顶层。 ECD模块可以被配置为从CMP模块接收半导体晶片并且用金属填充互连特征。 CMP模块还可以被配置为从ECD模块接收半导体晶片并且选择性地从半导体晶片去除多余的金属和第二顶层。 还提供了在半导体晶片上形成互连的方法，以及其他方面。