公开(公告)号：US20220238533A1

公开(公告)日：2022-07-28

申请号：US17717582

申请日：2022-04-11

申请人： Applied Materials, Inc.

发明人： Lequn Liu ,  Priyadarshi Panda ,  Jonathan C. Shaw

IPC分类号： H01L27/108 ,  H01L21/67

摘要： Methods of forming a DRAM bit line to improve line edge roughness (LER) and lower resistance are described. The method comprises implanting an inert species into a bit line metal layer having a first grain size on a substrate to form an amorphized bit line metal layer having a second grain size smaller than the first grain size. A film stack is then deposited on the amorphized bit line metal layer. The film stack and amorphized bit line metal layer are etched to form a patterned film stack on the substrate. The patterned film stack on the substrate is thermally annealed.

公开(公告)号：US11751382B2

公开(公告)日：2023-09-05

申请号：US17717582

申请日：2022-04-11

申请人： Applied Materials, Inc.

发明人： Lequn Liu ,  Priyadarshi Panda ,  Jonathan C. Shaw

IPC分类号： H01L21/67 ,  H10B12/00

CPC分类号： H10B12/482 ,  H01L21/67167 ,  H01L21/67213

摘要： Methods of forming a DRAM bit line to improve line edge roughness (LER) and lower resistance are described. The method comprises implanting an inert species into a bit line metal layer having a first grain size on a substrate to form an amorphized bit line metal layer having a second grain size smaller than the first grain size. A film stack is then deposited on the amorphized bit line metal layer. The film stack and amorphized bit line metal layer are etched to form a patterned film stack on the substrate. The patterned film stack on the substrate is thermally annealed.

公开(公告)号：US11329052B2

公开(公告)日：2022-05-10

申请号：US16939361

申请日：2020-07-27

申请人： Applied Materials, Inc.

发明人： Lequn Liu ,  Priyadarshi Panda ,  Jonathan C. Shaw

IPC分类号： H01L27/108 ,  H01L21/67

摘要： Methods of forming a DRAM bit line to improve line edge roughness (LER) and lower resistance are described. The method comprises implanting an inert species into a bit line metal layer having a first grain size on a substrate to form an amorphized bit line metal layer having a second grain size smaller than the first grain size. A film stack is then deposited on the amorphized bit line metal layer. The film stack and amorphized bit line metal layer are etched to form a patterned film stack on the substrate. The patterned film stack on the substrate is thermally annealed.

公开(公告)号：US20210035982A1

公开(公告)日：2021-02-04

申请号：US16939361

申请日：2020-07-27

申请人： Applied Materials, Inc.

发明人： Lequn Liu ,  Priyadarshi Panda ,  Jonathan C. Shaw

IPC分类号： H01L27/108 ,  H01L21/67

摘要： Methods of forming a DRAM bit line to improve line edge roughness (LER) and lower resistance are described. The method comprises implanting an inert species into a bit line metal layer having a first grain size on a substrate to form an amorphized bit line metal layer having a second grain size smaller than the first grain size. A film stack is then deposited on the amorphized bit line metal layer. The film stack and amorphized bit line metal layer are etched to form a patterned film stack on the substrate. The patterned film stack on the substrate is thermally annealed.