公开(公告)号：US20250087573A1

公开(公告)日：2025-03-13

申请号：US18464926

申请日：2023-09-11

Applicant: Applied Materials, Inc.

Inventor： Tyler Sherwood ,  Raghav Sreenivasan ,  Michael Chudzik ,  Maria Gorchichko

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/48 ,  H01L23/64

Abstract: The interconnect resistances in a hybrid bonded structure can be controlled and designed. The resistance of each interconnect can be controlled by the width of the vias, the number of vias, and the thickness of liners within the vias. A first interconnect and a second interconnect of a hybrid bonded structure can have different interconnect resistances despite being on the same wafer or chip. The techniques described herein include designing interconnects and forming interconnects with particular resistances.

公开(公告)号：US20250079357A1

公开(公告)日：2025-03-06

申请号：US18460189

申请日：2023-09-01

Applicant: Applied Materials, Inc.

Inventor： Tyler Sherwood ,  Raghav Sreenivasan ,  Maria Gorchichko ,  Kun Li

IPC: H01L23/00 ,  H01L21/02 ,  H01L21/67

Abstract: A first structure for semiconductor devices having a dielectric film on the top surface can be used to form semiconductor devices that are composed of hybrid bonded structures with reduced dielectric surface area and reduced pitch for metal studs. The top surface of the dielectric film of the first structure can be hybrid bonded to a dielectric layer of a second structure. The dielectric film of the first structure and the dielectric layer of the second structure can be different dielectrics. In this way, the hybrid bonding of the two structures includes the hybrid bonding of asymmetric dielectrics.