METHODS AND STRUCTURES FOR HIGH STRENGTH DIELECTRIC IN HYBRID BONDING

    公开(公告)号:US20250079312A1

    公开(公告)日:2025-03-06

    申请号:US18460154

    申请日:2023-09-01

    Abstract: A structure for semiconductor devices having a high-dielectric constant dielectric film on the top surface of the structure can be used to form semiconductor devices that are composed of hybrid bonded structures with reduced dielectric surface area and reduced pitch for metal studs. For example, the dielectric constant of the dielectric film can be about or greater than 7 or 8. A semiconductor device can be formed by hybrid bonding the dielectric film of the structure to a dielectric film of a similar structure. A dielectric film-oxide-metal-substrate structure can be formed with the dielectric film on the top surface of the stack. A multi-material etch can be used etch features in the dielectric film and the oxide in a dielectric film-oxide-metal-substrate stack. A chemical-mechanical polishing technique can be used to precisely form the surface of the structure in preparation for hybrid bonding.

    CHEMICAL MECHANICAL POLISHING FOR COPPER DISHING CONTROL

    公开(公告)号:US20230066610A1

    公开(公告)日:2023-03-02

    申请号:US17411599

    申请日:2021-08-25

    Abstract: Methods of semiconductor processing may include contacting a substrate with a first slurry and a first platen. The substrate may include silicon oxide defining one or more features, a liner extending across the silicon oxide and within the one or more features, and a copper-containing layer deposited on the liner and extending within the one or more features. The first slurry and the first platen may remove a first portion of the copper-containing layer. The methods may include contacting the substrate with a second slurry and a second platen, which may remove at least a portion of the liner. The methods may include contacting the substrate with a third slurry and a third platen, which may remove a second portion of the copper-containing layer. The methods may include contacting the substrate with a fourth slurry and a fourth platen, which may remove at least a portion of the silicon oxide.

    METHOD AND MATERIAL SYSTEM FOR HIGH STRENGTH SELECTIVE DIELECTRIC IN HYBRID BONDING

    公开(公告)号:US20250079356A1

    公开(公告)日:2025-03-06

    申请号:US18460174

    申请日:2023-09-01

    Abstract: A structure for semiconductor devices having a high-dielectric constant dielectric film on the top surface can be used to form devices that are composed of hybrid bonded structures with reduced dielectric surface area and reduced pitch for metal studs. The dielectric constant of the dielectric film can be about or greater than 8. A device can be formed by hybrid bonding the dielectric film of the structure to a dielectric film of a similar structure. A technique for forming the structure can include selectively depositing the dielectric film via atomic layer deposition after features filled with metal in a top layer of oxide in an oxide-metal-substrate stack. In order to selectively deposit the dielectric film, the metal may be covered with a polymer which can be burned off. A chemical-mechanical polishing technique can be used to precisely form the surface of the structure in preparation for hybrid bonding.

    Method for LCoS DBR multilayer stack protection via sacrificial hardmask for RIE and CMP processes

    公开(公告)号:US11573452B2

    公开(公告)日:2023-02-07

    申请号:US17100422

    申请日:2020-11-20

    Abstract: Processing methods may be performed to forming a pixel material in a semiconductor structure. The methods may include forming a sacrificial hardmask overlying an uppermost layer of an optical stack of the semiconductor structure, the uppermost layer having a thickness. The methods may include forming a via through the sacrificial hardmask in the optical stack by a first etch process unselective to a metal layer of the semiconductor structure. The methods may include filling the via with a fill material, wherein a portion of the fill material extends over the sacrificial hardmask and contacts the metal layer. The methods may include removing a portion of the fill material external to the via by a removal process selective to the fill material. The methods may also include removing the sacrificial hardmask by a second etch process selective to the sacrificial hardmask while maintaining the thickness of the uppermost layer.

    Methods to fabricate dual pore devices

    公开(公告)号:US11536708B2

    公开(公告)日:2022-12-27

    申请号:US16738629

    申请日:2020-01-09

    Abstract: Embodiments of the present disclosure provide dual pore sensors and methods for producing these dual pore sensors. The method includes forming a film stack, where the film stack contains two silicon layers and two membrane layers, and then etching the film stack to produce a channel extending therethrough and having two reservoirs and two nanopores. The method also includes depositing a oxide layer on inner surfaces of the reservoirs and nanopores, depositing a dielectric layer on the oxide layer, and forming a metal contact extending through a portion of the stack. The method further includes etching the dielectric layers to form wells, etching the first silicon layer to reveal the protective oxide layer deposited on the inner surfaces of a reservoir, and etching the protective oxide layer deposited on the inner surfaces of the reservoirs and the nanopores.

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