-
公开(公告)号：US20210111033A1
公开(公告)日：2021-04-15
申请号：US16598167
申请日：2019-10-10
发明人： Mikhail Korolik , Paul E. Gee , Bhaskar Jyoti Bhuyan , John Sudijono , Doreen Wei Ying Yong , Kah Wee Ang , Debanjan Jana , Niharendu Mahapatra
IPC分类号： H01L21/311
摘要： Exemplary methods of etching a silicon-containing material may include flowing a fluorine-containing precursor into a remote plasma region of a semiconductor processing chamber. The fluorine-containing precursor may be characterized by a molecular formula of XFy, and y may be greater than or equal to 5. The methods may include forming a plasma within the remote plasma region to generate plasma effluents of the fluorine-containing precursor. The methods may include flowing the plasma effluents into a processing region of the semiconductor processing chamber. A substrate may be positioned within the processing region, and the substrate may include a trench formed through stacked layers including alternating layers of silicon nitride and silicon oxide. The methods may include laterally etching the layers of silicon nitride.
-
公开(公告)号：US20220293430A1
公开(公告)日：2022-09-15
申请号：US17590142
申请日：2022-02-01
发明人： Mikhail Korolik , Paul E. Gee , Bhaskar Jyoti Bhuyan , John Sudijono , Wei Ying Doreen Yong , Kah Wee Ang , Samarth Jain
IPC分类号： H01L21/311 , H01L21/02 , H01J37/32
摘要： Exemplary methods of etching a silicon-containing material may include flowing a fluorine-containing precursor into a remote plasma region of a semiconductor processing chamber. The methods may include forming a plasma within the remote plasma region to generate plasma effluents of the fluorine-containing precursor. The methods may include flowing the plasma effluents into a processing region of the semiconductor processing chamber. A substrate may be positioned within the processing region. The substrate may include a trench formed through stacked layers including alternating layers of silicon nitride and silicon oxide. The methods may include isotropically etching the layers of silicon nitride while substantially maintaining the silicon oxide.
-
公开(公告)号：US12022667B2
公开(公告)日：2024-06-25
申请号：US17521347
申请日：2021-11-08
发明人： Xuewei Feng , Kah Wee Ang
CPC分类号： H10B63/84 , G11C13/0002 , H10N70/011 , H10N70/253
摘要： This disclosure describes a self-selective multi-terminal memtransistor suitable for use in crossbar array circuits. In particular, the memtransistor comprises a sapphire substrate that has a single-layer of polycrystalline molybdenum disulphide (MoS2) thin film formed on the surface of the substrate, wherein the MoS2 thin film comprise MoS2 grains that are oriented along terraces provided on the surface of the substrate. The memtransistor has a drain electrode and a source electrode that is formed on the MoS2 thin film such that a channel is defined in the MoS2 thin film between the drain and source electrodes, and a gate electrode formed above the channel, whereby the gate electrode is isolated from the channel by a gate dielectric layer.
-
公开(公告)号：US20220149115A1
公开(公告)日：2022-05-12
申请号：US17521347
申请日：2021-11-08
发明人： Xuewei Feng , Kah Wee Ang
摘要： This disclosure describes a self-selective multi-terminal memtransistor suitable for use in crossbar array circuits. In particular, the memtransistor comprises a sapphire substrate that has a single-layer of polycrystalline molybdenum disulphide (MoS2) thin film formed on the surface of the substrate, wherein the MoS2 thin film comprise MoS2 grains that are oriented along terraces provided on the surface of the substrate. The memtransistor has a drain electrode and a source electrode that is formed on the MoS2 thin film such that a channel is defined in the MoS2 thin film between the drain and source electrodes, and a gate electrode formed above the channel, whereby the gate electrode is isolated from the channel by a gate dielectric layer.
-
-
-
搜索结果
4 条记录 (耗时 0.017 秒)
