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公开(公告)号：US20220196734A1
公开(公告)日：2022-06-23
申请号：US17127846
申请日：2020-12-18
Applicant: Arm Limited
Inventor： Richard Andrew Paterson , Rainer Herberholz , Peter Andrew Rees Williams , Oded Golombek , Einat Luko , Jeffrey Scott Boyer
IPC: G01R31/3177 , G01R31/317
Abstract: Disclosed are methods, systems and devices for implementing built-in self-test (BIST) to be performed by an untrusted party and/or in an unsecure testing environment. In an embodiment, a test access port (TAP) on a device may enable a party to initiate execution of one or more BIST procedures on the device. Additionally, such a TAP may enable loading of encrypted instructions to be executed by one or more processors formed on a device under test.
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公开(公告)号：US11924357B2
公开(公告)日：2024-03-05
申请号：US17655235
申请日：2022-03-17
Applicant: Arm Limited
Inventor： Einat Luko , Jeremy Patrick Dubeuf
CPC classification number: H04L9/3252 , H04L9/0869 , H04L9/3257
Abstract: A method of generating a digital signature. The method comprises calculating a first random number and, based on second and third random numbers, first and second modified versions thereof. A curve point on an elliptic curve is determined based on a base point and the first modified version. A first signature part is calculated based on the curve point. Based on the second and third random numbers, the modified versions of the first random number, data to be signed, the first signature part, and a private key, a second signature part and a check value for the second signature part are calculated. The second signature part is compared with the check value for the second signature part and, responsive to the check value for the second signature part matching the second signature part, a cryptographic signature is output comprising the first signature part and the second signature part.
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Patent Agency Ranking
公开(公告)号：US11550733B2
公开(公告)日：2023-01-10
申请号：US16918938
申请日：2020-07-01
Applicant: Arm Limited
Inventor： Richard Andrew Paterson , Rainer Herberholz , Peter Andrew Rees Williams , Oded Golombek , Einat Luko
Abstract: Disclosed are methods, systems and devices for storing states in a memory in support of applications residing in a trusted execution environment (TEE). In an implementation, one or more memory devices accessible by a memory controller may be shared between and/or among processes in an untrusted execution environment (UEE) and a TEE.
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公开(公告)号：US12099593B2
公开(公告)日：2024-09-24
申请号：US17245371
申请日：2021-04-30
Applicant: Arm Limited
Inventor： Oded Golombek , Einat Luko
CPC classification number: G06F21/44 , G06F21/6209
Abstract: A method for authenticating an integrated circuit is provided. At an intellectual property facility, a random encryption key and a number of random input vectors are generated. For each input vector, the input vector is encrypted, based on the encryption key, to generate a corresponding output vector, and the input vector and the corresponding output vector are formed into an authentication vector pair. The encryption key is embedded into hardware description language instructions that define an integrated circuit that includes a cryptography engine. A number of authentication vector pairs is transmitted, via a secure communication link, to a semiconductor assembly and test facility. An input vector of an authentication vector pair is presented to the integrated circuit, which encrypts the input vector using the embedded encryption key. If the result matches the output vector of the authentication vector pair, the integrated circuit is determined to be authentic.
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公开(公告)号：US20220350875A1
公开(公告)日：2022-11-03
申请号：US17245371
申请日：2021-04-30
Applicant: Arm Limited
Inventor： Oded Golombek , Einat Luko
Abstract: A method for authenticating an integrated circuit is provided. At an intellectual property facility, a random encryption key and a number of random input vectors are generated. For each input vector, the input vector is encrypted, based on the encryption key, to generate a corresponding output vector, and the input vector and the corresponding output vector are formed into an authentication vector pair. The encryption key is embedded into hardware description language instructions that define an integrated circuit that includes a cryptography engine. A number of authentication vector pairs is transmitted, via a secure communication link, to a semiconductor assembly and test facility. An input vector of an authentication vector pair is presented to the integrated circuit, which encrypts the input vector using the embedded encryption key. If the result matches the output vector of the authentication vector pair, the integrated circuit is determined to be authentic.
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公开(公告)号：US11480613B2
公开(公告)日：2022-10-25
申请号：US17127846
申请日：2020-12-18
Applicant: Arm Limited
Inventor： Richard Andrew Paterson , Rainer Herberholz , Peter Andrew Rees Williams , Oded Golombek , Einat Luko , Jeffrey Scott Boyer
IPC: G01R31/3177 , G01R31/3187 , G01R31/317 , G01R31/3185 , G01R31/28 , H04L9/08
Abstract: Disclosed are methods, systems and devices for implementing built-in self-test (BIST) to be performed by an untrusted party and/or in an unsecure testing environment. In an embodiment, a test access port (TAP) on a device may enable a party to initiate execution of one or more BIST procedures on the device. Additionally, such a TAP may enable loading of encrypted instructions to be executed by one or more processors formed on a device under test.
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公开(公告)号：US20220004622A1
公开(公告)日：2022-01-06
申请号：US16918938
申请日：2020-07-01
Applicant: Arm Limited
Inventor： Richard Andrew Paterson , Rainer Herberholz , Peter Andrew Rees Williams , Oded Golombek , Einat Luko
Abstract: Disclosed are methods, systems and devices for storing states in a memory in support of applications residing in a trusted execution environment (TEE). In an implementation, one or more memory devices accessible by a memory controller may be shared between and/or among processes in an untrusted execution environment (UEE) and a TEE.
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