公开(公告)号：US20230376381A1

公开(公告)日：2023-11-23

申请号：US18316614

申请日：2023-05-12

Applicant: Arm Limited

Inventor： Fernando GARCIA REDONDO ,  Jonas ŠVEDAS ,  Sahan Sajeewa Hiniduma Udugama GAMAGE

IPC: G06F11/14 ,  G06F1/30 ,  G06F13/28

CPC classification number: G06F11/1407 ,  G06F11/1438 ,  G06F1/30 ,  G06F13/28

Abstract: A method comprising, in response to a power-drop warning, beginning a checkpointing process comprising storing, to a non-volatile memory, execution state associated with data processing operations performed by data processing circuitry. The method also comprises maintaining, in the non-volatile memory, a checkpoint-progress indication to indicate which of multiple sections of the execution state have been stored as part of the checkpointing process.

公开(公告)号：US20230376218A1

公开(公告)日：2023-11-23

申请号：US18316538

申请日：2023-05-12

Applicant: Arm Limited

Inventor： Fernando GARCIA REDONDO ,  Sahan Sajeewa Hiniduma Udugama GAMAGE ,  Jonas ŠVEDAS ,  Parameshwarappa Anand Kumar SAVANTH

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0673

Abstract: In response to a power-loss warning event occurring during data processing, a checkpointing process is performed to save a checkpoint of context data associated with the data processing to non-volatile data storage. In response to detection of a power recovery event occurring when the checkpointing process is still in progress, it is determined whether a checkpoint abort condition is satisfied, based at least on a checkpoint progress indication indicative of progress of the checkpointing process. If the checkpoint abort condition is unsatisfied, the checkpointing process can continue. If the checkpoint abort condition is satisfied, the checkpointing process is aborted to allow the data processing to resume.

公开(公告)号：US20230359260A1

公开(公告)日：2023-11-09

申请号：US18309364

申请日：2023-04-28

Applicant: Arm Limited

Inventor： Sahan Sajeewa Hiniduma Udugama GAMAGE ,  Parameshwarappa Anand Kumar SAVANTH ,  Fernando GARCIA REDONDO ,  Jonas ŠVEDAS

IPC: G06F1/3228 ,  G06F1/3296

CPC classification number: G06F1/3228 ,  G06F1/3296 ,  G06F2201/81

Abstract: A method for an intermittent computing apparatus includes performing processing operations with processing circuitry, starting a timer counter in response to a first power level threshold event occurring when a power level for powering the processing circuitry reaches a first threshold value, and signalling the first power level threshold event to the processing circuitry in response to the timer counter reaching a target value.