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公开(公告)号：US11182234B2
公开(公告)日：2021-11-23
申请号：US16409314
申请日：2019-05-10
Applicant: Arm Limited
Inventor： Asaf Shen , Subbayya Chowdary Yanamadala
Abstract: A system for tracking events of interest can include at least one volatile counter; a nonvolatile storage coupled to the at least one volatile counter, the nonvolatile storage storing a bit for each top volatile count number of events identified by the at least one volatile counter; a backup power source coupled to the at least one volatile counter; and readout circuitry and control logic coupled to the one or more of the at least one volatile counter and to the nonvolatile storage, the readout circuitry and control logic being configured to control operations of the at least one volatile counter during an error event and determine a total number of events.
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公开(公告)号：US10601525B2
公开(公告)日：2020-03-24
申请号：US15958206
申请日：2018-04-20
Applicant: Arm Limited
Inventor： Mikael Yves Marie Rien , Subbayya Chowdary Yanamadala
Abstract: A system incorporating a power distribution for functional circuit blocks can include a functional circuit block comprising two or more sub-circuits; a power line comprising at least two segments, a first sub-circuit of the two or more sub-circuits being coupled to a first segment of the at least two segments, and a second sub-circuit of the two or more sub-circuits being coupled to a second segment of the at least two segments; and at least one power delivery circuit (PDC) coupled to the power line at a location to create an electromagnetic flux on two adjacent segments of the at least two segments that is in opposite directions. The PDCs can be arranged coupled to the power line with a number and at locations optimized for mitigating electromagnetic emissions on the power line.
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公开(公告)号：US12118088B2
公开(公告)日：2024-10-15
申请号：US16855716
申请日：2020-04-22
Applicant: Arm Limited
Inventor： Subbayya Chowdary Yanamadala , Jeremy Patrick Dubeuf , Carl Wayne Vineyard , Matthias Lothar Boettcher , Hugo John Martin Vincent , Shidhartha Das
CPC classification number: G06F21/566 , G06F9/54 , G06F21/72 , G06F21/85 , G06F2221/034
Abstract: A moderator system that can receive outputs of various stages of the security analytic framework and can receive input from external sources to provide information about emerging styles of attacks. One or more models/behavioral profiles can be curated by the moderator system, and the moderator system can provide updates to components of the security analytics framework.
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公开(公告)号：US11232196B2
公开(公告)日：2022-01-25
申请号：US16409205
申请日：2019-05-10
Applicant: Arm Limited
Abstract: A computing device can include a comparator coupled to an I/O pin of the computing device; a storage unit coupled to the comparator; and a counter coupled to receive an output of the comparator, an output of the counter being coupled to a computation engine to provide a limit-exceeded signal to the computation engine, wherein the counter comprises a volatile counter and a nonvolatile storage, wherein the nonvolatile storage stores a bit for each top volatile count number of events identified by the volatile counter. The computing device can further include a backup power source coupled to the volatile counter; and readout circuitry and control logic coupled to the volatile counter and to the nonvolatile storage, the readout circuitry and control logic being configured to control operations of the volatile counter during an error event and determine a total number of events. The computing device can be a smart card.
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公开(公告)号：US11550965B2
公开(公告)日：2023-01-10
申请号：US16855659
申请日：2020-04-22
Applicant: Arm Limited
Inventor： Subbayya Chowdary Yanamadala , Jeremy Patrick Dubeuf , Carl Wayne Vineyard , Matthias Lothar Boettcher , Hugo John Martin Vincent , Shidhartha Das
Abstract: Analytics processing circuitry can include a data scavenger and a data analyzer coupled to receive the data from the data scavenger. The data scavenger collects data from at least one element of interest of a plurality of elements of interest of an IC. The data analyzer identifies patterns in the data from the data scavenger over a time frame or for a snapshot of time based on a predefined metric. The analytics processing circuitry can further include a moderator and a risk predictor. The risk predictor generates a risk assessment regarding whether the data collected by the data scavenger is indicative of normal behavior or abnormal behavior based at least on the output of the data analyzer and a behavioral model for the IC, which can be device and application specific. A threat response can be performed based on the risk assessment.
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Patent Agency Ranking
公开(公告)号：US11022637B2
公开(公告)日：2021-06-01
申请号：US16244364
申请日：2019-01-10
Applicant: Arm Limited
Inventor： Subbayya Chowdary Yanamadala , Mikael Yves Marie Rien
IPC: G01R29/02 , G01R31/28 , G01R31/317 , G01R31/3185
Abstract: A sensor system includes a sensor having a charge storage device controllably connected to a voltage source under control of a signal under test; and a readout circuit coupled to the charge storage device to determine whether the pulse width of the signal under test has changed greater than a threshold amount according to a voltage at the charge storage device. In some cases, the determination of whether the pulse width of the signal under test has changed includes determining whether the voltage satisfies a condition with respect to a comparison voltage. In some cases, the determination of whether the pulse width of the signal under test has changed is based on a propagation delay through a delay chain, where the propagation delay is dependent on the voltage.
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公开(公告)号：US10955864B2
公开(公告)日：2021-03-23
申请号：US15913051
申请日：2018-03-06
Applicant: Arm Limited
Inventor： Subbayya Chowdary Yanamadala
Abstract: A configurable charge storage network and control system provide a context-aware power network for a system including a circuit, the power network coupled to the circuit to provide a core voltage to the circuit; and a context-based controller that monitors a supply voltage level of a power supply, monitors a core voltage level of the core voltage, and monitors activity of the circuit to derive an activity level of the circuit; and based on the activity level of the circuit, adjusts a capacitance of the power network or charging parameters associated with the power network to correspond to a power requirement associated with the activity level.
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公开(公告)号：US11128449B2
公开(公告)日：2021-09-21
申请号：US16409354
申请日：2019-05-10
Applicant: Arm Limited
Inventor： Asaf Shen , Subbayya Chowdary Yanamadala
Abstract: The described cipher system includes a bits of some randomness (BOSR) reservoir; a first multiplexer circuit that receives a BOSR key, a functional key, and a first control signal for selection between the BOSR key and the functional key; a second multiplexer circuit that receives a BOSR state, a functional state, and a second control signal for selection between the BOSR state and the functional state; a block cipher logic circuit that receives the outputs from the first and second multiplexer circuits and a functional input. The block cipher outputs bits into either the BOSR reservoir or as a functional output according to a third control signal. The cipher system includes a control logic block that outputs the first control signal, second control signal, and third control signal and controls whether a clock cycle of the block cipher logic circuit is used for a BOSR operation or a functional operation.
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公开(公告)号：US11119840B2
公开(公告)日：2021-09-14
申请号：US16409314
申请日：2019-05-10
Applicant: Arm Limited
Inventor： Asaf Shen , Subbayya Chowdary Yanamadala
Abstract: A system for tracking events of interest can include at least one volatile counter; a nonvolatile storage coupled to the at least one volatile counter, the nonvolatile storage storing a bit for each top volatile count number of events identified by the at least one volatile counter; a backup power source coupled to the at least one volatile counter; and readout circuitry and control logic coupled to the one or more of the at least one volatile counter and to the nonvolatile storage, the readout circuitry and control logic being configured to control operations of the at least one volatile counter during an error event and determine a total number of events.
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公开(公告)号：US11043102B1
公开(公告)日：2021-06-22
申请号：US16244502
申请日：2019-01-10
Applicant: Arm Limited
Inventor： Subbayya Chowdary Yanamadala , Mikael Yves Marie Rien
Abstract: An electronic system can include a charge storage device controllably connected to a voltage source; a protected circuit block controllably connected to the charge storage device for receiving a voltage supply from the charge storage device, the protected circuit block operating via an operating clock signal; a voltage detector coupled to the voltage supply of the protected circuit block; a comparator coupled to an output of the voltage detector; and a countermeasure processor coupled to receive an alert signal from an output of the comparator. The voltage at the voltage supply is related to the frequency of the operating clock and a frequency manipulation attack is detected by monitoring a difference between the voltage supply and a comparison voltage.
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