公开(公告)号：US08365047B2

公开(公告)日：2013-01-29

申请号：US13330999

申请日：2011-12-20

申请人： Ravi Palanki ,  Jeremy H. Lin ,  Aamod Khandekar ,  Alexei Gorokhov ,  Avneesh Agrawal

发明人： Ravi Palanki ,  Jeremy H. Lin ,  Aamod Khandekar ,  Alexei Gorokhov ,  Avneesh Agrawal

IPC分类号： H03M13/00

CPC分类号： H04L1/0007 ,  H04L1/0009 ,  H04L1/0021 ,  H04L1/0042 ,  H04L1/1812 ,  H04L1/1822

摘要： Techniques for encoding and decoding data are described. In an aspect, multiple code rates for a forward error correction (FEC) code may be supported, and a suitable code rate may be selected based on packet size. A transmitter may obtain at least one threshold to use for code rate selection, determine a packet size to use for data transmission, and select a code rate from among the multiple code rates based on the packet size and the at least one threshold. In another aspect, multiple FEC codes of different types (e.g., Turbo, LDPC, and convolutional codes) may be supported, and a suitable FEC code may be selected based on packet size. The transmitter may obtain at least one threshold to use for FEC code selection and may select an FEC code from among the multiple FEC codes based on the packet size and the at least one threshold.

公开(公告)号：US07209461B2

公开(公告)日：2007-04-24

申请号：US09852436

申请日：2001-05-09

申请人： Avneesh Agrawal ,  Jeremy H. Lin

发明人： Avneesh Agrawal ,  Jeremy H. Lin

IPC分类号： H04B7/216

CPC分类号： H04B1/7117 ,  H04B1/7115 ,  H04B2201/70707

摘要： Techniques for increased finger demodulation capability in a hardware efficient manner are disclosed. In one aspect, I and Q samples are shifted into a parallel-accessible shift register. A plurality of chip samples are accessed from the shift register and operated on in parallel to produce a multi-chip result for a channel each cycle. These multi-chip results can be accumulated and output to a symbol-rate processor on symbol boundaries. The scheduling of shift register access, computation, and accumulation can be scheduled such that the hardware is time-shared to support a large number of channels. In another aspect, time-tracking of a large number of channels can be accommodated through channel-specific indexing of the contents of the shift register file. These aspects, along with various others also presented, provide for hardware efficient chip rate processing capability for a large number of channels, with a high degree of flexibility in deployment of those channels.

摘要翻译： 公开了以硬件有效的方式增加手指解调能力的技术。 在一个方面，I和Q样本被移入并行可访问的移位寄存器。 从移位寄存器访问多个芯片样本，并行操作，以产生每个周期的信道的多芯片结果。 这些多芯片结果可以被累加并输出到符号边界上的符号速率处理器。 可以调度移位寄存器访问，计算和累加的调度，使得硬件是时分的，以支持大量信道。 在另一方面，可以通过针对移位寄存器文件的内容的特定索引来容纳大量信道的时间跟踪。 这些方面以及还提出了各种其他方面，为大量渠道提供硬件高效的芯片速率处理能力，在这些频道的部署方面具有高度的灵活性。

公开(公告)号：US20100067598A1

公开(公告)日：2010-03-18

申请号：US12405649

申请日：2009-03-17

申请人： Hemanth Sampath ,  Avneesh Agrawal ,  Jeremy H. Lin

发明人： Hemanth Sampath ,  Avneesh Agrawal ,  Jeremy H. Lin

IPC分类号： H04L5/12 ,  H04L27/06

CPC分类号： H03M13/45 ,  H03M13/6588 ,  H04L1/0046 ,  H04L1/1819 ,  H04L1/1822 ,  H04L1/1835 ,  H04L1/1845 ,  H04L5/0007 ,  H04L25/067

摘要： A system involves a transmitting device (for example, a first wireless communication device) and a receiving device (for example, a second wireless communication device). In the receiving device, LLR (Log-Likelihood Ratio) values are stored into an LLR buffer. LLR bit width is adjusted as a function of packet size of an incoming transmission to reduce the LLR buffer size required and/or to prevent LLR buffer capacity from being exceeded. The receiver may use a higher performance demodulator in order to maintain performance despite smaller LLR bit width. In the transmitting device, encoder code rate is adjusted as a function of receiver LLR buffer capacity and packet size of the outgoing transmission such that receiver LLR buffer capacity is not exceeded. Any combination of receiver LLR bit width adjustment, demodulator selection, and encoder code rate adjustment can be practiced to reduce LLR buffer size required while maintaining performance.

摘要翻译： 系统涉及发送设备（例如，第一无线通信设备）和接收设备（例如，第二无线通信设备）。 在接收设备中，将LLR（对数似然比）值存储到LLR缓冲器中。 根据输入传输的分组大小调整LLR比特宽度，以减少所需的LLR缓冲区大小和/或防止超出LLR缓冲区容量。 接收机可以使用更高性能的解调器，以便尽管较小的LLR位宽度来保持性能。 在发送设备中，根据接收机LLR缓冲器容量和输出传输的分组大小调节编码器码率，使得接收机LLR缓冲器容量不被超过。 可以实现接收机LLR位宽度调整，解调器选择和编码器码率调整的任何组合，以在保持性能的同时减少所需的LLR缓冲区大小。

公开(公告)号：US20080168332A1

公开(公告)日：2008-07-10

申请号：US11943172

申请日：2007-11-20

申请人： Ravi Palanki ,  Jeremy H. Lin ,  Aamod Khandekar ,  Alexei Gorokhov ,  Avneesh Agrawal

发明人： Ravi Palanki ,  Jeremy H. Lin ,  Aamod Khandekar ,  Alexei Gorokhov ,  Avneesh Agrawal

IPC分类号： H03M13/05 ,  G06F11/10

CPC分类号： H04L1/0007 ,  H04L1/0009 ,  H04L1/0021 ,  H04L1/0042 ,  H04L1/1812 ,  H04L1/1822

摘要： Techniques for encoding and decoding data are described. In an aspect, multiple code rates for a forward error correction (FEC) code may be supported, and a suitable code rate may be selected based on packet size. A transmitter may obtain at least one threshold to use for code rate selection, determine a packet size to use for data transmission, and select a code rate from among the multiple code rates based on the packet size and the at least one threshold. In another aspect, multiple FEC codes of different types (e.g., Turbo, LDPC, and convolutional codes) may be supported, and a suitable FEC code may be selected based on packet size. The transmitter may obtain at least one threshold to use for FEC code selection and may select an FEC code from among the multiple FEC codes based on the packet size and the at least one threshold.

摘要翻译： 描述用于编码和解码数据的技术。 在一方面，可以支持用于前向纠错（FEC）码的多个码率，并且可以基于分组大小来选择合适的码率。 发射机可以获得用于码率选择的至少一个阈值，确定用于数据传输的分组大小，并且基于分组大小和至少一个阈值从多个码率中选择码率。 在另一方面，可以支持不同类型的多个FEC码（例如，Turbo，LDPC和卷积码），并且可以基于分组大小来选择合适的FEC码。 发射机可以获得用于FEC码选择的至少一个阈值，并且可以基于分组大小和至少一个阈值从多个FEC码中选择FEC码。

公开(公告)号：US08873671B2

公开(公告)日：2014-10-28

申请号：US12405649

申请日：2009-03-17

申请人： Hemanth Sampath ,  Avneesh Agrawal ,  Jeremy H. Lin

发明人： Hemanth Sampath ,  Avneesh Agrawal ,  Jeremy H. Lin

IPC分类号： H04L27/00 ,  H04L1/00 ,  H03M13/00 ,  H04L25/06 ,  H03M13/45 ,  H04L5/00 ,  H04L1/18

CPC分类号： H03M13/45 ,  H03M13/6588 ,  H04L1/0046 ,  H04L1/1819 ,  H04L1/1822 ,  H04L1/1835 ,  H04L1/1845 ,  H04L5/0007 ,  H04L25/067

摘要： A system involves a transmitting device (for example, a first wireless communication device) and a receiving device (for example, a second wireless communication device). In the receiving device, LLR (Log-Likelihood Ratio) values are stored into an LLR buffer. LLR bit width is adjusted as a function of packet size of an incoming transmission to reduce the LLR buffer size required and/or to prevent LLR buffer capacity from being exceeded. The receiver may use a higher performance demodulator in order to maintain performance despite smaller LLR bit width. In the transmitting device, encoder code rate is adjusted as a function of receiver LLR buffer capacity and packet size of the outgoing transmission such that receiver LLR buffer capacity is not exceeded. Any combination of receiver LLR bit width adjustment, demodulator selection, and encoder code rate adjustment can be practiced to reduce LLR buffer size required while maintaining performance.

摘要翻译： 系统涉及发送设备（例如，第一无线通信设备）和接收设备（例如，第二无线通信设备）。 在接收设备中，将LLR（对数似然比）值存储到LLR缓冲器中。 根据输入传输的分组大小调整LLR比特宽度，以减少所需的LLR缓冲区大小和/或防止超出LLR缓冲区容量。 接收机可以使用更高性能的解调器，以便尽管较小的LLR位宽度来保持性能。 在发送设备中，根据接收机LLR缓冲器容量和输出传输的分组大小调节编码器码率，使得接收机LLR缓冲器容量不被超过。 可以实现接收机LLR位宽度调整，解调器选择和编码器码率调整的任何组合，以在保持性能的同时减少所需的LLR缓冲区大小。

公开(公告)号：US08566676B2

公开(公告)日：2013-10-22

申请号：US11943172

申请日：2007-11-20

申请人： Ravi Palanki ,  Jeremy H. Lin ,  Aamod Khandekar ,  Alexei Gorokhov ,  Avneesh Agrawal

发明人： Ravi Palanki ,  Jeremy H. Lin ,  Aamod Khandekar ,  Alexei Gorokhov ,  Avneesh Agrawal

IPC分类号： H03M13/00

CPC分类号： H04L1/0007 ,  H04L1/0009 ,  H04L1/0021 ,  H04L1/0042 ,  H04L1/1812 ,  H04L1/1822

摘要： Techniques for encoding and decoding data are described. In an aspect, multiple code rates for a forward error correction (FEC) code may be supported, and a suitable code rate may be selected based on packet size. A transmitter may obtain at least one threshold to use for code rate selection, determine a packet size to use for data transmission, and select a code rate from among the multiple code rates based on the packet size and the at least one threshold. In another aspect, multiple FEC codes of different types (e.g., Turbo, LDPC, and convolutional codes) may be supported, and a suitable FEC code may be selected based on packet size. The transmitter may obtain at least one threshold to use for FEC code selection and may select an FEC code from among the multiple FEC codes based on the packet size and the at least one threshold.

摘要翻译： 描述用于编码和解码数据的技术。 在一方面，可以支持用于前向纠错（FEC）码的多个码率，并且可以基于分组大小来选择合适的码率。 发射机可以获得用于码率选择的至少一个阈值，确定用于数据传输的分组大小，并且基于分组大小和至少一个阈值从多个码率中选择码率。 在另一方面，可以支持不同类型的多个FEC码（例如，Turbo，LDPC和卷积码），并且可以基于分组大小来选择合适的FEC码。 发射机可以获得用于FEC码选择的至少一个阈值，并且可以基于分组大小和至少一个阈值从多个FEC码中选择FEC码。

公开(公告)号：US08320407B2

公开(公告)日：2012-11-27

申请号：US11968631

申请日：2008-01-02

申请人： Ravi Palanki ,  Jeremy H. Lin ,  Aamod Khandekar ,  Alexei Gorokhov ,  Avneesh Agrawal

发明人： Ravi Palanki ,  Jeremy H. Lin ,  Aamod Khandekar ,  Alexei Gorokhov ,  Avneesh Agrawal

IPC分类号： H04J4/00

CPC分类号： H04L47/15 ,  H04L47/70

摘要： Techniques for transmitting data in a communication system are described. A packet may be partitioned into multiple subpackets, and each subpacket may be encoded separately. The subpackets may be mapped to resources assigned for transmission of the packet, with at least one subpacket being mapped to a subset of the assigned resources. The assigned resources may include multiple tiles, with each tile corresponding to a block of time frequency resources. The subpackets may be mapped to the tiles such that (i) the subpackets are mapped to equal number of tiles to achieve similar decoding performance, (ii) each subpacket is mapped to at least NMIN tiles, if available, to achieve a certain minimum diversity order for the subpacket, and/or (iii) each subpacket is mapped to a subset of the multiple tiles, if possible, so that the subpacket can be decoded without having to demodulate all of the tiles.

摘要翻译： 描述在通信系统中传输数据的技术。 分组可以被划分成多个子分组，并且每个子分组可以被分开编码。 子分组可以被映射到分配用于分组的传输的资源，其中至少一个子分组被映射到所分配的资源的子集。 分配的资源可以包括多个瓦片，其中每个瓦片对应于时间频率资源块。 子分组可以被映射到瓦片，使得（i）子分组被映射到相等数量的分块以实现类似的解码性能，（ii）每个子分组被映射到至少NMIN分块（如果可用），以获得一定的最小分集 如果可能，每个子分组被映射到多个分块的子集，使得子分组可以被解码而不必解调所有的分块。

公开(公告)号：US20080240159A1

公开(公告)日：2008-10-02

申请号：US11968631

申请日：2008-01-02

申请人： Ravi Palanki ,  Jeremy H. Lin ,  Aamod Khandekar ,  Alexei Gorokhov ,  Avneesh Agrawal

发明人： Ravi Palanki ,  Jeremy H. Lin ,  Aamod Khandekar ,  Alexei Gorokhov ,  Avneesh Agrawal

IPC分类号： H04J3/24

CPC分类号： H04L47/15 ,  H04L47/70

摘要： Techniques for transmitting data in a communication system are described. A packet may be partitioned into multiple subpackets, and each subpacket may be encoded separately. The subpackets may be mapped to resources assigned for transmission of the packet, with at least one subpacket being mapped to a subset of the assigned resources. The assigned resources may include multiple tiles, with each tile corresponding to a block of time frequency resources. The subpackets may be mapped to the tiles such that (i) the subpackets are mapped to equal number of tiles to achieve similar decoding performance, (ii) each subpacket is mapped to at least NMIN tiles, if available, to achieve a certain minimum diversity order for the subpacket, and/or (iii) each subpacket is mapped to a subset of the multiple tiles, if possible, so that the subpacket can be decoded without having to demodulate all of the tiles.

摘要翻译： 描述用于在通信系统中发送数据的技术。 分组可以被划分成多个子分组，并且每个子分组可以被分开编码。 子分组可以被映射到分配用于分组的传输的资源，其中至少一个子分组被映射到所分配的资源的子集。 分配的资源可以包括多个瓦片，其中每个瓦片对应于时间频率资源块。 子分组可以被映射到瓦片，使得（i）子分组被映射到相等数量的分块以实现类似的解码性能，（ii）每个子分组被映射到至少N分钟分块，如果 为了实现子包的一定的最小分集顺序，和/或（iii）每个子包被映射到多个片的子集，如果可能的话，使得子包可被解码而不必解调所有的片。

公开(公告)号：US20090248774A1

公开(公告)日：2009-10-01

申请号：US12411728

申请日：2009-03-26

申请人： Arunava Chaudhuri ,  Hemanth Sampath ,  Iwen Yao ,  Jeremy H. Lin ,  Raghu N. Challa ,  Min Wu

发明人： Arunava Chaudhuri ,  Hemanth Sampath ,  Iwen Yao ,  Jeremy H. Lin ,  Raghu N. Challa ,  Min Wu

IPC分类号： G06F17/14

CPC分类号： G06F17/142 ,  H04L5/0007 ,  H04L5/0023 ,  H04L5/0053 ,  H04L27/265 ,  H04L27/2662

摘要： An improved processing engine for performing Fourier transforms includes an instruction processor configured to process sequential instruction software commands and a Fourier transform engine coupled to the instruction processor. The Fourier transform engine is configured to perform Fourier transforms on a serial stream of data. The Fourier transform engine is configured to receive configuration information and operational data from the instruction processor via a set of software tasks.

摘要翻译： 用于执行傅里叶变换的改进的处理引擎包括配置成处理顺序指令软件命令的指令处理器和耦合到指令处理器的傅里叶变换引擎。 傅立叶变换引擎被配置为对串行数据流执行傅里叶变换。 傅里叶变换引擎被配置为经由一组软件任务从指令处理器接收配置信息和操作数据。

公开(公告)号：US07215935B2

公开(公告)日：2007-05-08

申请号：US10053398

申请日：2002-01-17

申请人： Subramanya P. Rao ,  Da-shan Shiu ,  Jeremy H. Lin ,  Jeong Geun Kim

发明人： Subramanya P. Rao ,  Da-shan Shiu ,  Jeremy H. Lin ,  Jeong Geun Kim

IPC分类号： H04B1/18 ,  H04B1/16

CPC分类号： H04B1/7077 ,  H04B1/70753 ,  H04B2201/70707

摘要： Techniques for segmented CDMA searching are disclosed. In one aspect, a searcher comprises a plurality of storage elements selectable for performing a plurality of segmentable search tasks, each storage element operable for storage of and access to state information for one of the plurality of search tasks. In another aspect, a first search task is interrupted in progress, the state information for the first task is stored, a second search task is performed, and the first search task is continued using the stored state information. In yet another aspect, a search task is segmented into smaller search segments, sized to fit within contiguous available time in the searcher. Various other aspects of the invention are also presented. These aspects have the benefit of circuit area and search-time efficiency which translate into reduced costs, increased standby time, increased acquisition speed, higher quality signal transmission, increased data throughput, decreased power, and improved overall system capacity.

摘要翻译： 公开了分段CDMA搜索的技术。 在一个方面，搜索器包括可选择用于执行多个可分割搜索任务的多个存储元件，每个存储元件可操作用于存储和访问多个搜索任务之一的状态信息。 在另一方面，第一搜索任务在进行中中断，存储第一任务的状态信息，执行第二搜索任务，并且使用所存储的状态信息继续第一搜索任务。 在另一方面，搜索任务被分割成较小的搜索段，其大小适合于搜索者中的连续可用时间。 还提出了本发明的各种其它方面。 这些方面具有电路面积和搜索时间效率的优点，从而降低了成本，增加了待机时间，提高了采集速度，提高了信号传输质量，提高了数据吞吐量，降低了功耗，提高了整体系统容量。