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公开(公告)号:US20060119437A1
公开(公告)日:2006-06-08
申请号:US11270957
申请日:2005-11-10
申请人: Axel Thomsen , Yunteng Huang , Jerrell Hein , Derrick Wei
发明人: Axel Thomsen , Yunteng Huang , Jerrell Hein , Derrick Wei
IPC分类号: H03L7/00
CPC分类号: H03L7/0898 , H03L1/022 , H03L1/026 , H03L7/095 , H03L7/0992 , H03L7/197 , H03L7/1976 , H03L7/23 , H03L7/235 , H03L2207/50 , H04J3/0688
摘要: A voltage controlled clock synthesizer includes a phase-locked loop (PLL) circuit that receives a timing reference signal, a controllable oscillator circuit, such as a VCO, providing an oscillator output signal, and a feedback divider circuit coupled to the oscillator output signal. The frequency of the oscillator output signal is determined in part according to a stored value used to generate a first digital control signal that determines a divide ratio of the feedback divider circuit. A control voltage present on a voltage control input adjusts the frequency of the oscillator output signal around a frequency determined by the stored value. The control voltage is converted to second digital signal and is utilized in determining the first digital control signal in combination with the stored value.
摘要翻译: 电压控制时钟合成器包括接收定时参考信号的锁相环(PLL)电路,提供振荡器输出信号的可控振荡器电路,例如VCO,以及耦合到振荡器输出信号的反馈分频器电路。 振荡器输出信号的频率部分地根据用于产生确定反馈分频器电路的分频比的第一数字控制信号的存储值来确定。 存在于电压控制输入端的控制电压根据由存储的值确定的频率调整振荡器输出信号的频率。 控制电压被转换为第二数字信号,并用于与所存储的值组合确定第一数字控制信号。
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公开(公告)号:US20060119411A1
公开(公告)日:2006-06-08
申请号:US11003288
申请日:2004-12-03
申请人: Derrick Wei
发明人: Derrick Wei
IPC分类号: G06F7/64
CPC分类号: H03H19/004 , H03M3/496
摘要: A switched capacitor sampler circuit (220) includes an input terminal (224) for receiving an input voltage, an output terminal (226), a capacitor (222) having first and second terminals, and a switching circuit (230). The switching circuit (230) is coupled to the input terminal (224), the output terminal (226), and the first and second terminals of the capacitor (222). The switching circuit (230) stores a charge on the capacitor (222) proportional to the input voltage during a sample period, and transfers the charge from the capacitor (222) to the output terminal (226) during a transfer period subsequent to the sample period. The switching circuit (230) transfers the charge in a plurality of charge portions corresponding to a like plurality of phases of the transfer period.
摘要翻译: 开关电容器取样器电路(220)包括用于接收输入电压的输入端(224),输出端(226),具有第一和第二端的电容(222)和开关电路(230)。 开关电路(230)耦合到输入端子(224),输出端子(226)以及电容器(222)的第一和第二端子。 开关电路(230)在采样周期期间将电容器(222)上的电荷与输入电压成比例地存储,并且在采样之后的转移期间将电荷从电容器(222)传送到输出端子(226) 期。 开关电路(230)在对应于转移期间的多个相位的多个充电部分中传送电荷。
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公开(公告)号:US20070001746A1
公开(公告)日:2007-01-04
申请号:US11172446
申请日:2005-06-30
申请人: Derrick Wei
发明人: Derrick Wei
IPC分类号: G05F1/10
CPC分类号: H02M3/073 , H02M2001/009
摘要: A technique implements high impedance nodes using high threshold voltage devices that may generate less leakage current and may have a higher gate oxide breakdown voltage than standard devices in a particular manufacturing technology. Under at least one operating condition, for a particular power supply voltage, a circuit may unable to produce a control signal that is sufficient to turn on such a high threshold voltage device. The technique adjusts the control signal voltage to provide a gate-to-source voltage sufficient to turn on the high threshold voltage device. At another power supply voltage, when the circuit is able to produce a control signal sufficient to turn on the high threshold voltage device, the technique does not adjust the control signal.
摘要翻译: 一种技术实现了使用高阈值电压器件的高阻抗节点,其可以产生较少的漏电流并且可能具有比特定制造技术中的标准器件更高的栅极氧化物击穿电压。 在至少一个操作条件下,对于特定的电源电压,电路可能不能产生足以打开这种高阈值电压装置的控制信号。 该技术调节控制信号电压以提供足以打开高阈值电压装置的栅极至源极电压。 在另一电源电压下,当电路能够产生足以导通高阈值电压装置的控制信号时,该技术不调整控制信号。
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公开(公告)号:US20060119412A1
公开(公告)日:2006-06-08
申请号:US11004387
申请日:2004-12-03
申请人: Derrick Wei
发明人: Derrick Wei
IPC分类号: G06G7/18
CPC分类号: H03F3/005
摘要: A switched capacitor input circuit (200) includes an input buffer (210), a switched capacitor sampler circuit (220), and an integrator (250). The input buffer (210) has an input terminal for receiving an input voltage, and an output terminal. The switched capacitor sampler circuit (220) has an input terminal coupled to the output terminal of the input buffer (210), and an output terminal. The switched capacitor sampler circuit (220) includes a capacitor (222) and stores a charge proportional a voltage at the output terminal of the input buffer (210) in the capacitor (222) during a sample period, and transfers the charge from the capacitor (222) to the output terminal thereof during a transfer period subsequent to the sample period in a plurality of charge portions corresponding to a like plurality of phases of the transfer period. The integrator (250) has an input terminal coupled to the output terminal of the switched capacitor sampler circuit, and an output terminal for providing an output voltage signal.
摘要翻译: 开关电容器输入电路(200)包括输入缓冲器(210),开关电容器采样器电路(220)和积分器(250)。 输入缓冲器(210)具有用于接收输入电压的输入端子和输出端子。 开关电容器采样器电路(220)具有耦合到输入缓冲器(210)的输出端子的输入端子和输出端子。 开关电容器取样器电路(220)包括电容器(222),并且在采样周期期间在电容器(222)的输入缓冲器(210)的输出端存储电荷成比例的电压,并将电荷从电容器 (222)在对应于传送周期的相似多个阶段的多个计费部分中的采样周期之后的传输时段期间发送到其输出端。 积分器(250)具有耦合到开关电容器采样器电路的输出端的输入端和用于提供输出电压信号的输出端。
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公开(公告)号:US20070001743A1
公开(公告)日:2007-01-04
申请号:US11172431
申请日:2005-06-30
申请人: Derrick Wei , David Pietruszynski
发明人: Derrick Wei , David Pietruszynski
IPC分类号: H03K17/687
CPC分类号: H03K17/063 , H02M3/073 , H03K2005/00071 , H03K2005/00195
摘要: A technique implements high impedance nodes using high threshold voltage devices that may generate less leakage current and may have a higher gate oxide breakdown voltage than standard devices in a particular manufacturing technology. Under at least one operating condition, for a particular power supply voltage, a circuit may unable to produce a control signal that is sufficient to turn on such a high threshold voltage device. The technique adjusts the control signal voltage to provide a gate-to-source voltage sufficient to turn on the high threshold voltage device. At another power supply voltage, when the circuit is able to produce a control signal sufficient to turn on the high threshold voltage device, the technique does not adjust the control signal.
摘要翻译: 一种技术实现了使用高阈值电压器件的高阻抗节点,其可以产生较少的漏电流并且可能具有比特定制造技术中的标准器件更高的栅极氧化物击穿电压。 在至少一个操作条件下,对于特定的电源电压,电路可能不能产生足以打开这种高阈值电压装置的控制信号。 该技术调节控制信号电压以提供足以打开高阈值电压装置的栅极至源极电压。 在另一电源电压下,当电路能够产生足以导通高阈值电压装置的控制信号时,该技术不调整控制信号。
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