公开(公告)号：US20240412973A1

公开(公告)日：2024-12-12

申请号：US18206325

申请日：2023-06-06

Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc.

Inventor： Nathaniel P. Wyckoff ,  Benjamin Terry ,  Alexander S. Warren

IPC: H01L21/027 ,  H01L21/02

Abstract: A method includes forming a plurality of islands of first material on a plurality of first sections of a layer. A plurality of second sections of the layer are not covered by the first material. The method further includes depositing a second material on (i) the islands of first material and (ii) the second sections of the layer that are not covered by the islands of first material. The method further includes evaporating and/or sublimating the islands of first material and removing remnants of the second material that were on the islands of the first material. In an example, the second material remains on the second sections of the layer, to thereby form a pattern of the second material on the layer. In an example, the first material is a monomer, and the second material is a conductor or a dielectric or a semiconductor.

公开(公告)号：US20250071911A1

公开(公告)日：2025-02-27

申请号：US18452984

申请日：2023-08-21

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Nathaniel P. Wyckoff ,  Jacob R. Mauermann ,  Benjamin Terry ,  Justin D. Smith

IPC: H05K3/36

Abstract: A method fabricating at least one universal substrate from a batch product. The method includes steps of: providing a preform having a predetermined profile; wrapping a plurality of conductors about an outer surface of the preform; injecting a nonconductive matrix between conductors of the plurality of conductors, wherein the nonconductive matrix permeates between interstitial spaces of the plurality of conductors to isolate some conductors of the plurality of conductors from one another; forming the batch product that includes the plurality of conductors and the nonconductive matrix; and wafering at least one section of the batch product to form the at least one universal substrate. The plurality of conductors of the at least one universal substrate defines a first connection surface, a second connection surface opposite to the first connection surface, and a plurality of conductive pathways defined between the first connection surface and the second connection surface.

公开(公告)号：US20240413105A1

公开(公告)日：2024-12-12

申请号：US18206730

申请日：2023-06-07

Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc.

Inventor： Nathaniel P. Wyckoff ,  Benjamin Terry ,  Alexander S. Warren ,  Joseph Waggoner

IPC: H01L23/00

Abstract: A microelectronics device structure includes a device having (i) a lower surface, (ii) an upper surface opposite the lower surface, and (iii) a side surface extending between the lower surface and the upper surface. The integrated circuit structure further includes a conductive line having (i) a first section on the upper surface, (ii) a second section on the side surface, and (iii) a third section on the lower surface. In an example, the first section and the second section of the conductive line is a monolithic conductive structure, with no seam or interface between the first section and the second section. Additionally or alternatively, in an example, the second section and the third section of the conductive line is a monolithic conductive structure, with no seam or interface between the second section and the third section.