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公开(公告)号:US10530312B2
公开(公告)日:2020-01-07
申请号:US15857928
申请日:2017-12-29
Inventor: Daniel C. Boire
Abstract: An RF power amplifier includes an input coupler including a first resistor and a first capacitor, an input phase difference network of the input coupler including a first input direct current (DC) bias injection network and a second capacitor connected in series with the first resistor. The second capacitor increases a bandwidth of the RF power amplifier. The RF power amplifier may further include a first power amplifier and a second power amplifier. The first input DC bias injection network provides power to the first power amplifier and the second power amplifier. The RF power amplifier includes a lateral dimension narrower than a lateral dimension of an RF power amplifier comprising bias circuitry on two opposing sides.
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公开(公告)号:US20190207566A1
公开(公告)日:2019-07-04
申请号:US15857928
申请日:2017-12-29
Inventor: Daniel C. Boire
Abstract: An RF power amplifier includes an input coupler including a first resistor and a first capacitor, an input phase difference network of the input coupler including a first input direct current (DC) bias injection network and a second capacitor connected in series with the first resistor. The second capacitor increases a bandwidth of the RF power amplifier. The RF power amplifier may further include a first power amplifier and a second power amplifier. The first input DC bias injection network provides power to the first power amplifier and the second power amplifier. The RF power amplifier includes a lateral dimension narrower than a lateral dimension of an RF power amplifier comprising bias circuitry on two opposing sides.
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公开(公告)号:US11581299B2
公开(公告)日:2023-02-14
申请号:US16817588
申请日:2020-03-12
Inventor: Carlton T. Creamer , Daniel C. Boire , Kanin Chu , Hong M. Lu , Bernard J. Schmanski
Abstract: Techniques and architecture are disclosed for a method for making a custom circuit comprising forming a common wafer template, selecting at least two elements of the common wafer template to be chosen elements, and adding at least one metal layer to interconnect the chosen elements to form a circuit. The common wafer template includes a plurality of transistors, a plurality of resistors, a plurality of capacitors, and a plurality of bond pads. Final circuit customization of the common wafer template is accomplished by adding at least one metal layer that forms interconnects to passive and active elements in the template in order to complete the circuit.
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公开(公告)号:US20200294987A1
公开(公告)日:2020-09-17
申请号:US16817588
申请日:2020-03-12
Inventor: Carlton T. Creamer , Daniel C. Boire , Kanin Chu , Hong M. Lu , Bernard J. Schmanski
Abstract: Techniques and architecture are disclosed for a method for making a custom circuit comprising forming a common wafer template, selecting at least two elements of the common wafer template to be chosen elements, and adding at least one metal layer to interconnect the chosen elements to form a circuit. The common wafer template includes a plurality of transistors, a plurality of resistors, a plurality of capacitors, and a plurality of bond pads. Final circuit customization of the common wafer template is accomplished by adding at least one metal layer that forms interconnects to passive and active elements in the template in order to complete the circuit.
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