公开(公告)号：US3714460A

公开(公告)日：1973-01-30

申请号：US3714460D

申请日：1971-09-10

申请人： BELL TELEPHONE LABOR INC

发明人： CLEMETSON W ,  KUROKAWA K

IPC分类号： H03K19/12 ,  H03K19/21 ,  H03K19/32

CPC分类号： H03K19/12 ,  H03K19/21

摘要： An exclusive OR circuit comprises a primary winding having two input terminals and being closely coupled to first and second secondary windings. Rectifying diodes are connected to adjacent ends of the first and second secondary windings, which are adjacent the center of the primary winding. This configuration transmits an output pulse through one of the diodes only upon the application of one input pulse to one of the input terminals, and gives high speed voltage cancellation if coincident pulses are applied. In another embodiment, transistors used in place of the diodes give signal gain.

摘要翻译： 异或电路包括具有两个输入端并且紧密耦合到第一和第二次级绕组的初级绕组。 整流二极管连接到与初级绕组的中心相邻的第一和第二次级绕组的相邻端。 该配置仅在将一个输入脉冲施加到输入端之一时才通过其中一个二极管发送输出脉冲，并且如果施加了一致的脉冲则给出高速电压消除。 在另一个实施例中，代替二极管使用的晶体管产生信号增益。