MULTIPHASE POWER REGULATOR WITH LOAD ADAPTIVE PHASE CONTROL
    1.
    发明申请
    MULTIPHASE POWER REGULATOR WITH LOAD ADAPTIVE PHASE CONTROL 有权
    具有负载自适应相位控制的多相功率调节器

    公开(公告)号:US20090224731A1

    公开(公告)日:2009-09-10

    申请号:US12371835

    申请日:2009-02-16

    IPC分类号: G05F1/00

    CPC分类号: H02M3/1584 H02M2001/0012

    摘要: Disclosed is a power regulator for providing precisely regulated power to a microelectronic device such as a microprocessor. Improved power regulation is accomplished by optimizing the power efficiency of the power regulator. In particular, in a multiphase system, the number of active phases is increased or decreased to achieve optimum power efficiency. The multiphase voltage regulator adapts the operating mode to maximize efficiency as the load current demand of the load device changes by adjusting the number of active phases to maximize efficiency. The total value of current provided by the regulator and the total number of active phases is determined, the total number of active phases is compared with the number of active phases required to provide the total value of current at maximum efficiency; and the number of active phases is adjusted to provide the total value of current at maximum efficiency.A current sense circuit senses the current at each phase, a summing circuit coupled to the output of the current sense circuit provides the total current value of all the measured phases, a circuit coupled to the output of the summing circuit provides the time averaged total current value to a threshold detecting circuit that determines the number of phases at which the voltage regulator should be operating for maximum efficiency, and a circuit for comparing the number of phases that are operating to the number of phases at which the voltage regulator should be operating adjusts the number of active phases to the number of phases at which the voltage regulator should be operating for maximum efficiency.

    摘要翻译: 公开了一种功率调节器,用于向诸如微处理器的微电子器件提供精确调节的功率。 通过优化功率调节器的功率效率来实现改进的功率调节。 特别地,在多相系统中,活性相的数量增加或减少以达到最佳功率效率。 当负载设备的负载电流需求通过调节活动相数量来最大化效率而改变时,多相电压调节器可以适应操作模式以最大化效率。 确定调节器提供的电流总值和有效相的总数,将有效相的总数与最大效率提供电流总值所需的有效相数进行比较; 并且调整活动相的数量以提供最大效率的电流总值。 电流感测电路感测每相的电流,耦合到电流检测电路的输出的求和电路提供所有测量相位的总电流值,耦合到求和电路的输出的电路提供时间平均总电流 值到阈值检测电路,其确定电压调节器应该在最大效率下操作的相位数,以及用于将正在操作的相位数与用于调节电压的相位数进行比较的电路进行调整 电压调节器应运行的相数达到最大效率的有效相数。

    ACTIVE TRANSIENT RESPONSE CIRCUITS, SYSTEM AND METHOD FOR DIGITAL MULTIPHASE PULSE WIDTH MODULATED REGULATORS
    2.
    发明申请
    ACTIVE TRANSIENT RESPONSE CIRCUITS, SYSTEM AND METHOD FOR DIGITAL MULTIPHASE PULSE WIDTH MODULATED REGULATORS 有权
    有源瞬态响应电路,数字多相脉冲宽度调节调节器的系统和方法

    公开(公告)号:US20090167271A1

    公开(公告)日:2009-07-02

    申请号:US12396975

    申请日:2009-03-03

    IPC分类号: G05F1/10

    CPC分类号: H02M3/1584

    摘要: Disclosed is a multi-phase pulse width modulated voltage regulator and method in which transient voltage excursions or deviations that exceed the load line voltage by more than a predetermined amount are detected by an ATR circuit and a correction signal is applied. The correction signal is in the form of asynchronous pulses and the number of such pulses is a function of the magnitude of the voltage excursion as determined by the number of thresholds that are exceeded. Also disclosed is an adaptive voltage positioning (AVP) circuit and method for early detection of a transient event by sensing voltage changes at the load and adjusting the target voltage with pre-determined current values prior to the time that ATR event changes in the current at the load are detected. The AVP load line is pre-positioned for more precise current control. Also disclosed is an adaptive filter with adjustable frequency characteristics in response to an ATR event. Also disclosed is a pulse limiting circuit. Also disclosed is a tri-state implementation. Response to transient events is further improved with an external ATR circuit coupled to the load.

    摘要翻译: 公开了一种多相脉宽调制电压调节器和方法,其中通过ATR电路检测超过负载线电压超过预定量的瞬态电压偏移或偏差,并且施加校正信号。 校正信号是异步脉冲的形式,并且这样的脉冲的数量是由超过的阈值的数量确定的电压偏移的大小的函数。 还公开了一种用于通过感测负载上的电压变化来早期检测瞬态事件的自适应电压定位(AVP)电路和方法,并且在ATR事件在电流当前变化的时刻之前用预定电流值调节目标电压 检测负载。 AVP负载线预先定位,以实现更精确的电流控制。 还公开了响应于ATR事件具有可调频率特性的自适应滤波器。 还公开了一种脉冲限制电路。 还公开了三态实现。 外部ATR电路耦合到负载,进一步提高对瞬态事件的响应。

    MULTI-THRESHOLD MULTI-GAIN ACTIVE TRANSIENT RESPONSE CIRCUIT AND METHOD FOR DIGITAL MULTIPHASE PULSE WIDTH MODULATED REGULATORS
    3.
    发明申请
    MULTI-THRESHOLD MULTI-GAIN ACTIVE TRANSIENT RESPONSE CIRCUIT AND METHOD FOR DIGITAL MULTIPHASE PULSE WIDTH MODULATED REGULATORS 有权
    多阈值多增益活动瞬态响应电路和数字多相脉冲宽度调节调节器的方法

    公开(公告)号:US20110084678A1

    公开(公告)日:2011-04-14

    申请号:US12969366

    申请日:2010-12-15

    IPC分类号: G05F1/46

    CPC分类号: H02M3/1584

    摘要: Disclosed is a multi-phase pulse width, modulated voltage regulator and method in which transient voltage excursions or deviations that exceed the load line voltage by more than a pre-determined amount are detected by an ATR circuit and a correction signal is applied. The correction signal is in the form of asynchronous pulses and the number of such pulses is a function of the magnitude of the voltage excursion as determined by the number of thresholds that are exceeded. Also disclosed is an adaptive voltage positioning (AVP) circuit and method for early detection of a transient event by sensing voltage changes at the load and adjusting the target voltage with pre-determined current values prior to the time that ATR event changes in the current at the load are detected.

    摘要翻译: 公开了一种多相脉宽调制电压调节器和方法,其中通过ATR电路检测超过负载线电压的超过预定量的瞬态电压偏移或偏差,并且施加校正信号。 校正信号是异步脉冲的形式,并且这样的脉冲的数量是由超过的阈值的数量确定的电压偏移的大小的函数。 还公开了一种用于通过感测负载上的电压变化来早期检测瞬态事件的自适应电压定位(AVP)电路和方法,并且在ATR事件在电流当前变化的时刻之前用预定电流值调节目标电压 检测负载。

    MULTI-THRESHOLD MULTI-GAIN ACTIVE TRANSIENT RESPONSE CIRCUIT AND METHOD FOR DIGITAL MULTIPHASE PULSE WIDTH MODULATED REGULATORS
    4.
    发明申请
    MULTI-THRESHOLD MULTI-GAIN ACTIVE TRANSIENT RESPONSE CIRCUIT AND METHOD FOR DIGITAL MULTIPHASE PULSE WIDTH MODULATED REGULATORS 有权
    多阈值多增益活动瞬态响应电路和数字多相脉冲宽度调节调节器的方法

    公开(公告)号:US20090261795A1

    公开(公告)日:2009-10-22

    申请号:US12490071

    申请日:2009-06-23

    IPC分类号: G05F1/46

    CPC分类号: H02M3/1584

    摘要: Disclosed is a multi-phase pulse width modulated voltage regulator and method in which transient voltage excursions or deviations that exceed the load line voltage by more than a pre-determined amount are detected by an ATR circuit and a correction signal is applied. The correction signal is in the form of asynchronous pulses and the number of such pulses is a function of the magnitude of the voltage excursion as determined by the number of thresholds that are exceeded. Also disclosed is an adaptive voltage positioning (AVP) circuit and method for early detection of a transient event by sensing voltage changes at the load and adjusting the target voltage with pre-determined current values prior to the time that ATR event changes in the current at the load are detected.

    摘要翻译: 公开了一种多相脉宽调制电压调节器和方法,其中通过ATR电路检测超过负载线电压超过预定量的瞬态电压偏移或偏差,并且施加校正信号。 校正信号是异步脉冲的形式,并且这样的脉冲的数量是由超过的阈值的数量确定的电压偏移的大小的函数。 还公开了一种用于通过感测负载上的电压变化来早期检测瞬态事件的自适应电压定位(AVP)电路和方法,并且在ATR事件在电流当前变化的时刻之前用预定电流值调节目标电压 检测负载。

    METHODS AND APPARATUS FOR POWER SUPPLY LOAD DUMP COMPENSATION
    5.
    发明申请
    METHODS AND APPARATUS FOR POWER SUPPLY LOAD DUMP COMPENSATION 有权
    电源负载补偿的方法和装置

    公开(公告)号:US20100013452A1

    公开(公告)日:2010-01-21

    申请号:US12505838

    申请日:2009-07-20

    IPC分类号: G05F1/10

    摘要: Methods and apparatus for power supply load dump compensation according to various aspects of the present invention may operate in conjunction with a power stage system, such as a power stage system comprising a bootstrapped driver circuit and a power stage responsive to the driver circuit. The power stage system may further include a load dump compensation circuit connected to the driver circuit, wherein the load dump compensation circuit is configured to remove a bias current generated by the bootstrapped driver circuit. Various aspects of the present invention may be implemented in conjunction with any appropriate power supply, such as a switching regulator, for example a buck converter.

    摘要翻译: 根据本发明的各个方面的用于电源负载突降补偿的方法和装置可以与功率级系统结合操作,功率级系统例如包括自举驱动电路和响应于驱动器电路的功率级的功率级系统。 功率级系统还可以包括连接到驱动器电路的负载突降补偿电路,其中负载突降补偿电路被配置为去除由自举驱动电路产生的偏置电流。 本发明的各个方面可以结合任何适当的电源,例如开关调节器,例如降压转换器来实现。

    METHODS AND APPARATUS FOR CURRENT SENSING
    6.
    发明申请
    METHODS AND APPARATUS FOR CURRENT SENSING 有权
    电流传感的方法和装置

    公开(公告)号:US20090146643A1

    公开(公告)日:2009-06-11

    申请号:US12332707

    申请日:2008-12-11

    IPC分类号: G01R19/00

    CPC分类号: H02M3/156 H02M2001/0009

    摘要: Methods and apparatus for current sensing according to various aspects of the present invention sense the current in a circuit, such as an inductor circuit. The current sensing systems may comprise an RC element connected such that the RC time constant matches the L/R time constant of the inductor. The current sensor may be configured to generate voltages that are proportional to the instantaneous current in the inductor with scaled gain for a wide range of inductor self resistance (DCR) values.

    摘要翻译: 根据本发明的各个方面的用于电流感测的方法和装置感测诸如电感器电路的电路中的电流。 电流感测系统可以包括RC元件连接,使得RC时间常数与电感器的L / R时间常数匹配。 电流传感器可以被配置为产生与电感器中的瞬时电流成比例的电压,其具有用于宽范围的电感器自身电阻(DCR)值的缩放增益。

    PLL/DLL DUAL LOOP DATA SYNCHRONIZATION
    7.
    发明申请
    PLL/DLL DUAL LOOP DATA SYNCHRONIZATION 有权
    PLL / DLL双循环数据同步

    公开(公告)号:US20100166132A1

    公开(公告)日:2010-07-01

    申请号:US12719450

    申请日:2010-03-08

    IPC分类号: H04L7/00

    摘要: A dual loop (PLL/DLL) data synchronization system and method for plesiochronous systems is provided. A dual loop data serializer includes a phase lock loop (PLL) and a delayed lock loop (DLL) configured with a phase shifter in the feedback path of the PLL. The dual loop serializer locks to the input of the DLL instead of the local reference. Thus, the DLL adjusts the frequency from the PLL so that it matches the desired data rate. Each loop may be optimized for jitter tolerance with the net effect generating a synthesized clean clock (due to narrow bandwidth filtering) and VCO noise suppression (due to wide bandwidth filtering). A dual loop retimer includes a dual loop serializer (PLL/DLL) and a clock recovery DLL. The retimer resets the jitter budget to meet transmission requirements for an infinite number of repeater stages.

    摘要翻译: 提供了一种双循环(PLL / DLL)数据同步系统和方法,用于同步系统。 双环数据串行器包括在PLL的反馈路径中配置有移相器的锁相环(PLL)和延迟锁环(DLL)。 双循环串行器锁定到DLL的输入,而不是本地引用。 因此,DLL调整来自PLL的频率,使其与期望的数据速率相匹配。 每个环路可以针对抖动容限进行优化,其净效应产生合成的干净时钟(由于窄带宽滤波)和VCO噪声抑制(由于宽带宽滤波)。 双环重定时器包括双回路串行器(PLL / DLL)和时钟恢复DLL。 重新定时器重置抖动预算以满足无限数量的中继器级的传输要求。