摘要:
Disclosed is a power regulator for providing precisely regulated power to a microelectronic device such as a microprocessor. Improved power regulation is accomplished by optimizing the power efficiency of the power regulator. In particular, in a multiphase system, the number of active phases is increased or decreased to achieve optimum power efficiency. The multiphase voltage regulator adapts the operating mode to maximize efficiency as the load current demand of the load device changes by adjusting the number of active phases to maximize efficiency. The total value of current provided by the regulator and the total number of active phases is determined, the total number of active phases is compared with the number of active phases required to provide the total value of current at maximum efficiency; and the number of active phases is adjusted to provide the total value of current at maximum efficiency.A current sense circuit senses the current at each phase, a summing circuit coupled to the output of the current sense circuit provides the total current value of all the measured phases, a circuit coupled to the output of the summing circuit provides the time averaged total current value to a threshold detecting circuit that determines the number of phases at which the voltage regulator should be operating for maximum efficiency, and a circuit for comparing the number of phases that are operating to the number of phases at which the voltage regulator should be operating adjusts the number of active phases to the number of phases at which the voltage regulator should be operating for maximum efficiency.
摘要:
Disclosed is a multi-phase pulse width modulated voltage regulator and method in which transient voltage excursions or deviations that exceed the load line voltage by more than a predetermined amount are detected by an ATR circuit and a correction signal is applied. The correction signal is in the form of asynchronous pulses and the number of such pulses is a function of the magnitude of the voltage excursion as determined by the number of thresholds that are exceeded. Also disclosed is an adaptive voltage positioning (AVP) circuit and method for early detection of a transient event by sensing voltage changes at the load and adjusting the target voltage with pre-determined current values prior to the time that ATR event changes in the current at the load are detected. The AVP load line is pre-positioned for more precise current control. Also disclosed is an adaptive filter with adjustable frequency characteristics in response to an ATR event. Also disclosed is a pulse limiting circuit. Also disclosed is a tri-state implementation. Response to transient events is further improved with an external ATR circuit coupled to the load.
摘要:
Disclosed is a multi-phase pulse width, modulated voltage regulator and method in which transient voltage excursions or deviations that exceed the load line voltage by more than a pre-determined amount are detected by an ATR circuit and a correction signal is applied. The correction signal is in the form of asynchronous pulses and the number of such pulses is a function of the magnitude of the voltage excursion as determined by the number of thresholds that are exceeded. Also disclosed is an adaptive voltage positioning (AVP) circuit and method for early detection of a transient event by sensing voltage changes at the load and adjusting the target voltage with pre-determined current values prior to the time that ATR event changes in the current at the load are detected.
摘要:
Disclosed is a multi-phase pulse width modulated voltage regulator and method in which transient voltage excursions or deviations that exceed the load line voltage by more than a pre-determined amount are detected by an ATR circuit and a correction signal is applied. The correction signal is in the form of asynchronous pulses and the number of such pulses is a function of the magnitude of the voltage excursion as determined by the number of thresholds that are exceeded. Also disclosed is an adaptive voltage positioning (AVP) circuit and method for early detection of a transient event by sensing voltage changes at the load and adjusting the target voltage with pre-determined current values prior to the time that ATR event changes in the current at the load are detected.
摘要:
Methods and apparatus for power supply load dump compensation according to various aspects of the present invention may operate in conjunction with a power stage system, such as a power stage system comprising a bootstrapped driver circuit and a power stage responsive to the driver circuit. The power stage system may further include a load dump compensation circuit connected to the driver circuit, wherein the load dump compensation circuit is configured to remove a bias current generated by the bootstrapped driver circuit. Various aspects of the present invention may be implemented in conjunction with any appropriate power supply, such as a switching regulator, for example a buck converter.
摘要:
Methods and apparatus for current sensing according to various aspects of the present invention sense the current in a circuit, such as an inductor circuit. The current sensing systems may comprise an RC element connected such that the RC time constant matches the L/R time constant of the inductor. The current sensor may be configured to generate voltages that are proportional to the instantaneous current in the inductor with scaled gain for a wide range of inductor self resistance (DCR) values.
摘要:
A dual loop (PLL/DLL) data synchronization system and method for plesiochronous systems is provided. A dual loop data serializer includes a phase lock loop (PLL) and a delayed lock loop (DLL) configured with a phase shifter in the feedback path of the PLL. The dual loop serializer locks to the input of the DLL instead of the local reference. Thus, the DLL adjusts the frequency from the PLL so that it matches the desired data rate. Each loop may be optimized for jitter tolerance with the net effect generating a synthesized clean clock (due to narrow bandwidth filtering) and VCO noise suppression (due to wide bandwidth filtering). A dual loop retimer includes a dual loop serializer (PLL/DLL) and a clock recovery DLL. The retimer resets the jitter budget to meet transmission requirements for an infinite number of repeater stages.