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公开(公告)号：US20220334424A1
公开(公告)日：2022-10-20
申请号：US17417424
申请日：2020-12-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Kai CHEN , Yanqing CHEN , Ruichao LIU , Jie TONG , Xiaofeng ZHANG , Weida QIN , Ning WANG , Yan WANG , Wei LI , Haoyi XIN
IPC: G02F1/1339 , G02F1/1335 , G02F1/1333
Abstract: A display panel includes a display region and a photoelectric sensing region, a plurality of spacer, a plurality of first support pillars, a plurality of second support pillars, and a plurality of third support pillars. The display region is located outside the photoelectric sensing region; and the photoelectric sensing region includes a light transmitting region and a frame area surrounding the light transmitting region, and the frame region includes: a first region, a second region, and a third region. The plurality of the spacers are arranged in an array, and located within the display region, but not located within the light transmitting region. The plurality of the first support pillars are located within the first region. The plurality of the second support pillars are located within the second region. The plurality of the third support pillars are located within the third region.
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公开(公告)号：US20250044653A1
公开(公告)日：2025-02-06
申请号：US18776322
申请日：2024-07-18
Inventor： Jie TONG , Yanqing CHEN , Jian SUN , Jianyun XIE , Haoyi XIN , Xuelu WANG , Wenhong TIAN
IPC: G02F1/1362 , G02F1/1335 , H01L27/12
Abstract: The present disclosure provides a display panel and a display apparatus. The display panel includes: a base substrate; pixel light-transmitting regions, each pixel light-transmitting regions includes: pixel light-transmitting region rows extending in a first direction and arranged in a second direction; at least one of the pixel light-transmitting region rows includes: a first pixel light-transmitting region, a second pixel light-transmitting region, and a third pixel light-transmitting region; a length of the third pixel light-transmitting region is less than that of the first pixel light-transmitting region in the second direction, and is less than that of the second pixel light-transmitting region in the second direction; and a first blocking structure on one side of the base substrate, an orthographic projection of the first blocking structure is in a gap between orthographic projections of two at least partially adjacent third pixel light-transmitting regions in the second direction on the base substrate.
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公开(公告)号：US20230296942A1
公开(公告)日：2023-09-21
申请号：US17441272
申请日：2020-12-11
Inventor： Wei REN , Wei LI , Yanfeng LI , Haoyi XIN , Jing LI , Jingjing XU , Chenrong QIAO , Yanyong SONG , Xu QIAO , Rula SHA , Min ZHANG
IPC: G02F1/1343 , G02F1/1345
CPC classification number: G02F1/134309 , G02F1/13439 , G02F1/13454
Abstract: A pixel electrode, including: a plurality of strip-shaped first electrodes, where the plurality of the first electrodes are arranged along a first direction, each of the first electrodes extends along a second direction, and the second direction intersects with the first direction; a second electrode, where the second electrode is connected to first ends of the plurality of first electrodes, and the first ends of the plurality of first electrodes are connected through the second electrode; and a third electrode, where the third electrode is connected to a second end of at least one of the first electrodes, and a direction of an electric field of an area in which the third electrode is disposed intersects with both the first direction and the second direction.
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公开(公告)号：US20190204603A1
公开(公告)日：2019-07-04
申请号：US16214904
申请日：2018-12-10
Inventor： Chao LI , Wei LI , Yanfeng LI , Yanqing CHEN , Ning WANG , Weida QIN , Pan GUO , Yongchao WANG , Haoyi XIN
Abstract: A display panel includes a base substrate, and a plurality of sub-pixels disposed on the base substrate and located at least in a left eye display area and a right eye display area of the display panel. The left eye display area and the right eye display area are arranged side by side. An area of the display panel outside the left eye display area and the right eye display area is a non-display area.
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5.发明申请公开(公告)号：US20250035997A1
公开(公告)日：2025-01-30
申请号：US18704425
申请日：2021-12-24
Inventor： Lei YAO , Yongqiang ZHANG , Haoyi XIN , Jingyi XU , Feng LI , Yanfeng LI
IPC: G02F1/1362 , G02F1/1368
Abstract: A display substrate includes: a first base substrate; scanning lines a side of the first base substrate, extending in a first direction; and arranged in a second direction data lines at the same side of the first base substrate as the scanning lines and in a different layers from the scanning lines, extending in the second direction and arranged in the first direction; a common electrode layer at a side of the scanning lines and the data lines facing away from the first base substrate; and a first light shielding layer in contact with the common electrode layer, and including first light shielding portions extending in the second direction. The first direction intersects with the second direction. The first light shielding portions are in areas between adjacent sub-pixels in the first direction.
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Patent Agency Ranking
公开(公告)号：US20240411184A1
公开(公告)日：2024-12-12
申请号：US18812529
申请日：2024-08-22
Inventor： Yanyong SONG , Yanfeng LI , Haoyi XIN , Xu QIAO , Chenrong QIAO , Wei REN , Yu XING , Jingjing XU , Rula SHA , Guolei ZHI , Guangshuai WANG , Liwen XIN , Jingwei HOU
IPC: G02F1/1339 , G02F1/1333 , G02F1/1335 , G02F1/1343 , G02F1/1345 , G02F1/1362 , G02F1/1368 , G02F1/16756
Abstract: An array substrate includes a substrate, signal lines, conductive bumps, an insulating layer, and thin film transistors each including a gate, source, and drain. The conductive blocks are disposed on a portion of the substrate located in a bonding region. The insulating layer is located between every two adjacent conductive bumps. A distance from a surface of a conductive metal layer included in a conductive bump away from the substrate to the substrate is less than or equal to a distance from a surface of the insulating layer away from the substrate to the substrate. The gate and signal lines are disposed in a same layer. The conductive metal layer is disposed in a same layer as the source and drain. On the substrate, an orthogonal projection of the conductive metal layer is located within an orthogonal projection of a signal line connected to the conductive metal layer.
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公开(公告)号：US20240219780A1
公开(公告)日：2024-07-04
申请号：US18610520
申请日：2024-03-20
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Kai CHEN , Yanqing CHEN , Ruichao LIU , Jie TONG , Xiaofeng ZHANG , Weida QIN , Ning WANG , Yan WANG , Wei LI , Haoyi XIN
IPC: G02F1/1339 , G02F1/1333 , G02F1/1335
CPC classification number: G02F1/13394 , G02F1/13338 , G02F1/133512 , G02F1/133514 , G02F1/13396
Abstract: A display panel includes a display region and a photoelectric sensing region, a plurality of spacer, a plurality of first support pillars, a plurality of second support pillars, and a plurality of third support pillars. The display region is located outside the photoelectric sensing region; and the photoelectric sensing region includes a light transmitting region and a frame area surrounding the light transmitting region, and the frame region includes: a first region, a second region, and a third region. The plurality of the spacers are arranged in an array, and located within the display region, but not located within the light transmitting region. The plurality of the first support pillars are located within the first region. The plurality of the second support pillars are located within the second region. The plurality of the third support pillars are located within the third region.
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公开(公告)号：US20240170503A1
公开(公告)日：2024-05-23
申请号：US18283823
申请日：2022-10-31
Inventor： Haoyi XIN , Wei LI , Yanfeng LI , Jingjing XU , Min ZHANG , Rui FAN , Chenrong QIAO , Xiao YAN , Zhao LIU , Jing LI , Jianxiong FAN , Shangpeng LIU , Haidong SU
IPC: H01L27/12 , G02F1/1362
CPC classification number: H01L27/1248 , G02F1/136209 , G02F1/136222 , G02F1/136286 , H01L27/124
Abstract: An array substrate, a liquid crystal display panel and a display apparatus. The array substrate comprises: a substrate (10), a first insulating layer (20), a second insulating layer (30), a third insulating layer (40), a planarization layer (50), a first electrode layer (90A), a fourth insulating layer (70) and a second electrode layer (90B), the third insulating layer comprises a first interlayer insulating layer (40A), a second interlayer insulating layer (40B) and a third interlayer insulating layer (40C), which are sequentially stacked; the first interlayer insulating layer is located on the side of the second interlayer insulating layer close to the substrate (10), the third interlayer insulating layer is located on the side of the second interlayer insulating layer away from the substrate; the material of the first interlayer insulating layer and third interlayer insulating layer comprises silicon oxide, the material of the second interlayer insulating layer comprises silicon nitride.
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公开(公告)号：US20230047799A1
公开(公告)日：2023-02-16
申请号：US17976079
申请日：2022-10-28
Inventor： Wei REN , Wei LI , Yanfeng LI , Haoyi XIN , Jing LI , Jingjing XU , Chenrong QIAO , Yanyong SONG , Xu QIAO , Rula SHA , Min ZHANG
IPC: G02F1/1343 , G09G3/36
Abstract: Provided is a pixel structure. The pixel structure includes: a first electrode, a second electrode, and a liquid crystal layer that are disposed on one side of a substrate and successively stacked, wherein one of the first electrode and the second electrode is a pixel electrode and the other of the first electrode and the second electrode is a common electrode, and the second electrode includes a plurality of electrode branches sequentially arranged in a first direction, wherein each of the electrode branches includes a first end portion, a body portion, and a second end portion that are successively connected in a second direction, the body portion including at least one body segment.
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10.发明申请公开(公告)号：US20220291538A1
公开(公告)日：2022-09-15
申请号：US17770280
申请日：2021-04-14
Inventor： Yanyong SONG , Yanfeng LI , Haoyi XIN , Xu QIAO , Chenrong QIAO , Wei REN , Yu XING , Jingjing XU , Rula SHA , Guolei ZHI , Guangshuai WANG , Liwen XIN , Jingwei HOU
IPC: G02F1/1339 , G02F1/1362 , G02F1/1343 , G02F1/1368 , G02F1/1333 , G02F1/1335
Abstract: An array substrate has a display area and a bezel area located on at least one side of the display area. The bezel area includes a bonding region. The array substrate includes a substrate, a plurality of signal lines, a plurality of conductive bumps, and an insulating layer. The signal lines are disposed on the substrate. The conductive blocks are disposed on a portion of the substrate located in the bonding region, and a conductive bump is connected to at least one signal line. The insulating layer covers the plurality of signal lines and is located between every two adjacent conductive bumps. The conductive bump includes a conductive metal layer. A distance from a surface of the conductive metal layer away from the substrate to the substrate is less than or equal to a distance from a surface of the insulating layer away from the substrate to the substrate.
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