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公开(公告)号：US20180356925A1
公开(公告)日：2018-12-13
申请号：US15736635
申请日：2017-03-02
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yudong LIU , Rongcheng LIU , Hui WANG , Ning WANG , Jian MA , Hailong LI
CPC classification number: G06F3/0412 , G02F1/13338 , G06F3/044 , G06F2203/04103 , G06F2203/04111
Abstract: A touch substrate is disclosed, which comprises a substrate, an insulating layer, a first touch electrode, and a second touch electrode. The insulating layer is arranged on the substrate. The first and second touch electrodes are arranged on the substrate, have an overlapping region, and are insulated from each other in the overlapping region through the insulating layer. The substrate is provided with a first trench, in which the first touch electrode is at least partially arranged. By arranging the first touch electrode at least partially in the first trench, the difference in height due to the first touch electrode is reduced or eliminated, and adverse effects on films over the first touch electrode due to the difference in height are reduced or eliminated. A method for fabricating the touch substrate and a touch panel are also disclosed.
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公开(公告)号：US20240295777A1
公开(公告)日：2024-09-05
申请号：US17913018
申请日：2021-11-09
Inventor： Jinliang HU , Xiaofeng YIN , Jian MA , Lei ZHU , Chengyong ZHAN , Wenming REN
IPC: G02F1/1339 , G02F1/1362 , G02F1/1368
CPC classification number: G02F1/13394 , G02F1/13396 , G02F1/136227 , G02F1/136286 , G02F1/1368
Abstract: Provided is a liquid crystal display panel, including an array substrate and a color filter substrate that are arranged oppositely, and a plurality of photo spacers disposed between the array substrate and the color filter substrate. The array substrate is provided with a plurality of via holes, wherein the plurality of via holes are arranged in an array along two directions. In at least one of the two directions, widths of target end faces of at least part of the plurality of photo spacers are greater than widths of first opening faces of the via holes, wherein the target end face of the photo spacer is an end face, proximal to the array substrate, of the photo spacer, and the first opening face of the via hole is an opening face, proximal to the color filter substrate, of the via hole.
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公开(公告)号：US20230176238A1
公开(公告)日：2023-06-08
申请号：US17921581
申请日：2021-05-12
Inventor： Jianxing SHANG , Jinyu LI , Kunjing CHUNG , Jingjie SU , Xuecheng HOU , Zhenwu JIANG , Zhenyu WANG , Shenkang WU , Haiyang LU , Jian MA
IPC: G01T1/24 , H01L27/146
CPC classification number: G01T1/247 , H01L27/14663 , H01L27/14689
Abstract: Provided are a detection substrate and a ray detector. The detection substrate includes: a base substrate; a plurality of detection pixels located on the base substrate, at least one detection pixel serves as a detection marking pixel. The detection marking pixel includes: a storage capacitor, a first electrode plate of the storage capacitor coupled to a bias voltage end; a discharge circuit configured to write a signal of the bias voltage end into a second electrode plate of the storage capacitor under the control of a first scanning signal end; and a reading circuit coupled to an external reading circuit, the reading circuit configured to write the voltage of the second electrode plate of the storage capacitor into the external reading circuit and write a reference signal of the external reading circuit into the second electrode plate of the storage capacitor under the control of a second scanning signal end.
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公开(公告)号：US20230023604A1
公开(公告)日：2023-01-26
申请号：US17955849
申请日：2022-09-29
Inventor： Jian MA , Jinliang HU , Chengyong ZHAN , Wenming REN
IPC: G02F1/1339 , G02F1/1335
Abstract: The present disclosure relates to a counter substrate and display panel. The counter substrate includes a base substrate, PS pattern layer and alignment film. A surface of the PS pattern layer away from the base substrate is a support surface, and the PS pattern layer includes: main PSs in a display area and a peripheral barrier wall in a non-display area. The peripheral barrier wall has an elongated-strip shape and has a same length direction as a corresponding display area side, the support surface of the peripheral barrier wall is closer to the base substrate than that of the main PS, and a distance between the support surfaces of the peripheral barrier wall and main PS in a thickness direction is a first distance. A ratio between a width of the support surface of the peripheral barrier wall and the first distance is less than 100.
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Patent Agency Ranking
5.发明申请公开(公告)号：US20180275453A1
公开(公告)日：2018-09-27
申请号：US15838505
申请日：2017-12-12
Inventor： Rui Yin , Sang Man Yuk , Jian MA , Ya Yu , Guoqiang Zhong
IPC: G02F1/1335
Abstract: The present disclosure relates to a method for manufacturing a color filter substrate, a color substrate and a display panel in the field of display technology. The method includes: forming a color resistance layer on a basal substrate; forming a conversion layer on the basal substrate with the color resistance layer, wherein the thickness of the conversion layer is greater than the thickness of the color resistance layer and the conversion layer is convertible in color under the irradiation of preset light rays; and irradiating the conversion layer with the preset light rays so that the conversion layer is converted to a two-layer structure consisting of a black matrix (BM) pattern and a transparent over cover, wherein the BM pattern is disposed at the side of the conversion layer close to the basal substrate. In the present disclosure, it is not necessary to form the BM pattern and the over cover layer in separate two steps, because the conversion layer is formed on the basal substrate, and then is directly converted to the two-layer structure consisting of the BM pattern and the over cover layer by the preset light rays, thereby solving the problem that the method for manufacturing a color filter substrate is relatively complicated in the related art, and achieving the effect of simplifying the method for manufacturing the color filter substrate.
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公开(公告)号：US20240053640A1
公开(公告)日：2024-02-15
申请号：US18382550
申请日：2023-10-23
Inventor： Jian MA , Jinliang HU , Chengyong ZHAN , Wenming REN
IPC: G02F1/1339 , G02F1/1335
CPC classification number: G02F1/13394 , G02F1/133514 , G02F1/133512
Abstract: The present disclosure relates to a counter substrate and display panel. The counter substrate includes a base substrate, PS pattern layer and alignment film. A surface of the PS pattern layer away from the base substrate is a support surface, and the PS pattern layer includes: main PSs in a display area and a peripheral barrier wall in a non-display area. The peripheral barrier wall has an elongated-strip shape and has a same length direction as a corresponding display area side, the support surface of the peripheral barrier wall is closer to the base substrate than that of the main PS, and a distance between the support surfaces of the peripheral barrier wall and main PS in a thickness direction is a first distance.
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公开(公告)号：US20240234446A1
公开(公告)日：2024-07-11
申请号：US18616371
申请日：2024-03-26
Inventor： Wenming REN , Jinliang HU , Jian MA , Chengyong ZHAN
IPC: H01L27/12 , G02F1/1368
CPC classification number: H01L27/1248 , G02F1/1368 , H01L27/1296
Abstract: The present disclosure provides an array substrate and a method of manufacturing the same and a display panel, which belongs to the field of display technologies. The method of manufacturing the array substrate comprises: providing a base substrate; forming a drive circuit layer on the base substrate, wherein the drive circuit layer includes a switching transistor; forming an insulating material layer on one side of the drive circuit layer distal to the base substrate, wherein the insulating material layer has a connection via-hole exposing at least a part region of a drain electrode of the switching transistor; and forming an electrode layer on one side of the insulating material layer distal to the base substrate, wherein a surface of the electrode layer distal to the base substrate has groove structures extending to the connection via-hole.
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公开(公告)号：US20220310670A1
公开(公告)日：2022-09-29
申请号：US17297655
申请日：2020-09-29
Inventor： Wenming REN , Jinliang HU , Jian MA , Chengyong ZHAN
IPC: H01L27/12 , G02F1/1368
Abstract: The present disclosure provides an array substrate and a method of manufacturing the same and a display panel, which belongs to the field of display technologies. The method of manufacturing the array substrate comprises: providing a base substrate; forming a drive circuit layer on the base substrate, wherein the drive circuit layer includes a switching transistor; forming an insulating material layer on one side of the drive circuit layer distal to the base substrate, wherein the insulating material layer has a connection via-hole exposing at least a part region of a drain electrode of the switching transistor; and forming an electrode layer on one side of the insulating material layer distal to the base substrate, wherein a surface of the electrode layer distal to the base substrate has groove structures extending to the connection via-hole. The manufacturing method may avoid the occurrence of poor coating in forming an orientation layer.
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公开(公告)号：US20220206329A1
公开(公告)日：2022-06-30
申请号：US17358052
申请日：2021-06-25
Inventor： Jian MA , Jinliang HU , Chengyong ZHAN , Wenming REN
IPC: G02F1/1339 , G02F1/1335
Abstract: The present disclosure relates to a counter substrate and display panel. The counter substrate includes a base substrate, PS pattern layer and alignment film. A surface of the PS pattern layer away from the base substrate is a support surface, and the PS pattern layer includes: main PSs in a display area and a peripheral barrier wall in a non-display area. The peripheral barrier wall has an elongated-strip shape and has a same length direction as a corresponding display area side, the support surface of the peripheral barrier wall is closer to the base substrate than that of the main PS, and a distance between the support surfaces of the peripheral barrier wall and main PS in a thickness direction is a first distance. A ratio between a width of the support surface of the peripheral barrier wall and the first distance is less than 100.
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