公开(公告)号：US20070239929A1

公开(公告)日：2007-10-11

申请号：US11399975

申请日：2006-04-07

申请人： Ben Chen ,  Ngoc Le ,  David Sun

发明人： Ben Chen ,  Ngoc Le ,  David Sun

IPC分类号： G06F12/00

CPC分类号： G06F13/385 ,  G06F3/0607 ,  G06F3/0632 ,  G06F3/0661 ,  G06F3/0679 ,  G06F2213/3814

摘要： A Flash memory card system is disclosed. The Flash memory card system comprises a Flash memory wireless host adapter and a Flash memory bus wireless device. The Flash memory wireless host adapter comprises a Flash memory card connector and a Flash memory controller coupled to the Flash memory card connector. The Flash-52 memory card signals are converted to standard Flash memory internal bus signals by the Flash memory controller. The host adapter further comprises a Flash memory wireless module coupled to the Flash memory controller for receiving and transmitting the standard Flash memory bus signals wirelessly. The Flash-51 memory bus wireless device comprises a Flash memory bus wireless device adapter coupled to a Flash memory. The device adapter is paired to the wireless module for receiving and transmitting the standard Flash memory bus signals wirelessly. A host device storage capacity utilizing the Flash memory card system is expanded.

摘要翻译： 公开了一种闪存卡系统。 闪存卡系统包括闪存无线主机适配器和闪存总线无线设备。 闪存无线主机适配器包括闪存卡连接器和连接到闪存卡连接器的闪存控制器。 Flash-52存储卡信号由闪存控制器转换为标准闪存内部总线信号。 主机适配器还包括闪速存储器无线模块，其耦合到闪速存储器控制器，用于无线地接收和发送标准闪存总线信号。 Flash-51存储器总线无线设备包括耦合到闪存的闪存总线无线设备适配器。 设备适配器与无线模块配对，用于无线接收和发送标准闪存总线信号。 扩展了利用闪存卡系统的主机设备存储容量。

公开(公告)号：US20070235544A1

公开(公告)日：2007-10-11

申请号：US11401024

申请日：2006-04-10

申请人： Ben Chen ,  David Sun ,  George Shiu

发明人： Ben Chen ,  David Sun ,  George Shiu

IPC分类号： G06K7/00 ,  G06K7/06

CPC分类号： H05K5/0282 ,  H01R31/06

摘要： Method and system for expanding the memory capacity of devices that use flash memory cards. In one aspect, a memory card expander assembly includes an adaptor shaped to be connected to a memory card slot of a host device, and a receptacle assembly in communication with the adaptor and operative to be attached to the host device. The receptacle assembly includes an expanded memory card slot operative to connect to a memory card such that the host device can communicate with the connected memory card when the adaptor is connected to the memory card slot.

摘要翻译： 扩展使用闪存卡的设备的内存容量的方法和系统。 在一个方面，一种存储卡扩展器组件包括被成形为连接到主机设备的存储卡插槽的适配器以及与适配器通信并且可操作地连接到主机设备的插座组件。 插座组件包括扩展的存储卡插槽，其可操作以连接到存储卡，使得当适配器连接到存储卡插槽时，主机设备可与连接的存储卡通信。

公开(公告)号：US20060203556A1

公开(公告)日：2006-09-14

申请号：US11067095

申请日：2005-02-25

申请人： Ben Chen ,  David Chen ,  David Sun

发明人： Ben Chen ,  David Chen ,  David Sun

IPC分类号： G11C16/04

CPC分类号： G11C16/30 ,  G11C16/20

摘要： A Flash memory controller is disclosed. The Flash memory controller comprises a host interface, a Flash memory interface, controller logic coupled between the host interface, the controller logic handling a plurality of voltages. The controller also includes a mechanism for allowing a multiple voltage host to interface with a high voltage or a multiple voltage Flash memory. A multiple voltage Flash memory controller in accordance with the present invention provides the following advantages over conventional Flash memory controllers: (1) a voltage host is allowed to interface with multiple Flash memory components that operate at different voltages in any combination; (2) power consumption efficiency is improved by integrating the programmable voltage regulator, and voltage comparator mechanism with the Flash memory controller; (3) External jumper selection is eliminated for power source configuration; and (4) Flash memory controller power source interface pin-outs are simplified.

摘要翻译： 公开了一种闪存控制器。 闪存控制器包括主机接口，闪存接口，耦合在主机接口之间的控制器逻辑，处理多个电压的控制器逻辑。 控制器还包括允许多电压主机与高电压或多电压闪存接口的机构。 根据本发明的多电压闪速存储器控制器提供了比传统闪存控制器以下的优点：（1）允许电压主机与在任何组合中以不同电压工作的多个闪存组件进行接口; （2）通过将可编程稳压器和电压比较器机构与闪存控制器集成来提高功耗效率; （3）电源配置消除外部跳线选择; 和（4）闪存控制器电源接口引脚简化。

公开(公告)号：US20070261801A1

公开(公告)日：2007-11-15

申请号：US11799298

申请日：2007-05-01

申请人： Willis Mullet ,  Richard Hand ,  Derek Paquette ,  Darrin Brunk ,  Ben Chen ,  Fred Higgins

发明人： Willis Mullet ,  Richard Hand ,  Derek Paquette ,  Darrin Brunk ,  Ben Chen ,  Fred Higgins

IPC分类号： A47G5/02

CPC分类号： E06B9/86 ,  E06B9/42 ,  E06B2009/005

摘要： An apparatus for covering an opening in a structure may include spaced rails positioned at opposed sides of the opening. Each rail includes a channel and a is curtain movable along the rails to cover and uncover the opening. A locking bar is attached to one end of the curtain. The locking bar has opposed end portions received in the channels, and a locking channel is positioned close to the ends of each rail to receive the bar. The locking channel is disposed at an angle relative to the channel and the bar is selectively received in the locking channel to lock the curtain in a position covering the opening. In some embodiments the locking bar includes a length that spans the distance between the side rails and is selectively locked in the sill along at least thirty percent of the length.

摘要翻译： 用于覆盖结构中的开口的装置可以包括位于开口的相对侧的间隔开的轨道。 每个轨道包括一个通道，一个是沿轨道运动的窗帘，以覆盖和露出开口。 一个锁定杆连接到窗帘的一端。 锁定杆具有容纳在通道中的相对端部，并且锁定通道靠近每个轨道的端部定位以接收杆。 锁定通道相对于通道以一定角度设置，并且杆被选择性地容纳在锁定通道中以将窗帘锁定在覆盖开口的位置。 在一些实施例中，锁定杆包括跨越侧轨之间的距离的长度，并且沿长度的至少百分之三十被选择性地锁定在门槛中。

公开(公告)号：US20060281229A1

公开(公告)日：2006-12-14

申请号：US11148999

申请日：2005-06-10

申请人： Wei Koh ,  Ben Chen ,  David Chen

发明人： Wei Koh ,  Ben Chen ,  David Chen

IPC分类号： H01L21/00

CPC分类号： H05K3/284 ,  B29C45/14647 ,  B29C45/14655 ,  B29C45/14836 ,  B29C45/2708 ,  H01L21/565 ,  H01L2924/0002 ,  H05K1/117 ,  H05K2201/10159 ,  H05K2201/10689 ,  H05K2201/10734 ,  H05K2203/1311 ,  H05K2203/1316 ,  H05K2203/304 ,  H01L2924/00

摘要： A method for molding digital storage memory cards such as, for example, multimedia cards (MMC), secure digital cards (SD), and similar small form factor digital memory cards. A PCA subassembly including, for example, a leadframe (TSOP) package for enclosing a flash IC and a (e.g., land grad array) controller package for enclosing a controller IC are mounted on a printed wiring board within a mold cavity. A high melt flow index resin is injected into the mold cavity to form an integral, solid body within which to completely encapsulate the flash IC and controller packages and form a cover over top the flash IC package so as to maintain the required memory card height tolerance. In one embodiment, the resin material is injected downwardly into the mold cavity from locations above the respective rows of leads of the flash IC package. In another embodiment, the resin material is injected laterally into the mold body from locations at opposite sides thereof adjacent the respective rows of leads of the flash IC package.

摘要翻译： 一种用于模制数字存储存储卡的方法，例如多媒体卡（MMC），安全数字卡（SD）和类似的小尺寸数字存储卡。 包括例如用于封装闪存IC的引线框架（TSOP）封装和用于封闭控制器IC的（例如，平台梯度阵列）控制器封装件的PCA子组件安装在模具腔内的印刷线路板上。 将高熔体流动指数树脂注入到模腔中以形成整体的固体，其中完全封装闪存IC和控制器封装，并在闪存IC封装之上形成盖子，以便保持所需的存储卡高度公差 。 在一个实施例中，将树脂材料从闪存IC封装的相应引线行上方的位置向下注入模腔中。 在另一个实施例中，树脂材料从相邻于闪光IC封装的引线行的相对侧的位置侧向注入模具体。

公开(公告)号：US20060184721A1

公开(公告)日：2006-08-17

申请号：US11060649

申请日：2005-02-16

申请人： Ben Chen

发明人： Ben Chen

IPC分类号： G06F12/00

CPC分类号： G06F13/1694

摘要： A FLASH memory controller is disclosed. The controller comprises a microcontroller. The microcontroller including firmware for providing different mappings for different types of FLASH memory chips. The controller also includes FLASH control logic for communicating with the microcontroller and adapted to communicate via a FLASH data bus to at least one FLASH memory chip. The FLASH control logic including mapping logic for configuring the FLASH data bus based upon the type of FLASH memory chip coupled thereto. A method and system in accordance with the present invention provides the following advantages: Configurable data bus on the FLASH memory controller through software to simplify routing complexity. Configurable chip select and control bus for flexibility of FLASH memory placement. Elimination of external resistor network for layout simplicity. A scalable architecture for higher data bus bandwidth support. Auto-detection of FLASH memory type and capacity configuration.

摘要翻译： 公开了一种闪速存储器控制器。 控制器包括微控制器。 微控制器包括用于为不同类型的闪速存储器芯片提供不同映射的固件。 控制器还包括用于与微控制器进行通信并适于经由FLASH数据总线与至少一个闪速存储器芯片通信的FLASH控制逻辑。 FLASH控制逻辑包括用于基于与其耦合的闪速存储器芯片的类型配置FLASH数据总线的映射逻辑。 根据本发明的方法和系统提供以下优点：通过软件在FLASH存储器控制器上配置数据总线，以简化路由复杂度。 可配置芯片选择和控制总线，实现闪存放置的灵活性。 消除外部电阻网络进行布局简化。 用于更高数据总线带宽支持的可扩展架构。 自动检测闪存类型和容量配置。

公开(公告)号：US20060161729A1

公开(公告)日：2006-07-20

申请号：US11037646

申请日：2005-01-18

申请人： Awais Nemat ,  Sachin Gandhi ,  Guy Hutchison ,  Ben Chen

发明人： Awais Nemat ,  Sachin Gandhi ,  Guy Hutchison ,  Ben Chen

IPC分类号： G06F12/00

CPC分类号： G11C15/04 ,  G11C11/56

摘要： A quaternary content-addressable memory includes multiple entries configured to match a lookup word, with each of these entries including multiple cells and with the lookup word including multiple lookup bits for matching corresponding cells of each of the entries. Each of the cells is individually configurable to be in one of multiple states identified by two bits, with these states including a first matching state for matching a value of a corresponding bit of the lookup word with the value having a first matching value, a second matching state for matching the value of the corresponding bit having a second matching value, a wildcard state for matching the value of the corresponding bit having either the first or the second matching value, and an ignore state for indicating to ignore the cell in determining whether or not the entry to which the cell belongs matches the lookup word.

公开(公告)号：US07366136B1

公开(公告)日：2008-04-29

申请号：US11138343

申请日：2005-05-27

申请人： Rohit S. Kalbag ,  Robert Ephraim ,  Ben Chen

发明人： Rohit S. Kalbag ,  Robert Ephraim ,  Ben Chen

IPC分类号： H04Q7/00

CPC分类号： H04L12/14 ,  H04L12/1439 ,  H04L29/12311 ,  H04L61/2084 ,  H04W80/04

摘要： Duration based accounting for a packet data service, for example offered as a prepaid mobile IP (MIP) service through a public mobile wireless communication network, uses last detected user activity to determine the end of each session for accounting purposes. The accounting policy or algorithm defines user activity so as to include receipt of signaling related to the MIP session, such as signaling related to a termination by the user or the user's mobile station, in addition to packet data routed for the mobile station. If a session ends due to a network termination, e.g. binding expires or the network disconnects upon prepaid quota exhaustion, then the last user activity used for accounting purposes is the last data packet communication to/from the mobile station or the last received MIP session-related signaling message. For example, if MIP signaling terminates the session, then the session duration runs until receipt of that signaling.

摘要翻译： 对于例如通过公共移动无线通信网络提供为预付费移动IP（MIP）服务的分组数据服务的基于持续时间的计费使用最后检测到的用户活动来确定用于会计目的的每个会话的结束。 计费策略或算法定义用户活动，以便包括与MIP会话相关的信令的接收，诸如与用户或用户的移动台的终止相关的信令，以及为移动台路由的分组数据。 如果会话由于网络终止而结束，例如， 绑定到期或网络在预付配额耗尽时断开连接，则用于会计目的的最后一个用户活动是到/从移动台或最后接收的MIP会话相关信令消息的最后一个数据分组通信。 例如，如果MIP信令终止会话，那么会话持续时间将持续到接收到该信令。

公开(公告)号：US20070250564A1

公开(公告)日：2007-10-25

申请号：US11757955

申请日：2007-06-04

申请人： Ben Chen

发明人： Ben Chen

IPC分类号： G06F15/16

CPC分类号： G06F9/44573 ,  G06F9/4401

摘要： A method and system for providing a modular server-on-a-USB-flash-storage is disclosed. The server-on-a-USB-flash-storage is installed on a computing device. The method and system include providing USB interface logic, USB Local Control Program, a flash memory and a set of control button connectors, light emitting diodes (LED) connectors and a liquid crystal display (LCD) connector. The USB Local Control Program is coupled with the USB interface logic and the flash memory. The USB interface logic interacts with the computing device and allows computing device to detect the server board. The USB Local Control Program boots up the server and prepares the computing device for use as the server. The flash memory stores a server image for the server, which is provided to the computing device using the USB Local Control Program. The control button connectors allow the server to be turned on, shut down gracefully, or restored to its initial state, by a single press of buttons connected to these connectors. The LED and LCD connectors allow the system status to be displayed or shown.

摘要翻译： 公开了一种用于在USB闪存存储器上提供模块化服务器的方法和系统。 服务器上的USB闪存存储器安装在计算设备上。 该方法和系统包括提供USB接口逻辑，USB本地控制程序，闪存和一组控制按钮连接器，发光二极管（LED）连接器和液晶显示器（LCD）连接器。 USB本地控制程序与USB接口逻辑和闪存耦合。 USB接口逻辑与计算设备交互，允许计算设备检测服务器主板。 USB本地控制程序启动服务器并准备用作服务器的计算设备。 闪存存储服务器的服务器映像，该服务器映像使用USB本地控制程序提供给计算设备。 控制按钮连接器可以通过连接到这些连接器的一个按钮打开服务器，正常关闭或恢复到初始状态。 LED和LCD连接器可以显示或显示系统状态。

公开(公告)号：US5882947A

公开(公告)日：1999-03-16

申请号：US906085

申请日：1997-08-05

申请人： Jen-Tsung Lin ,  Ben Chen ,  Eddie Chen

发明人： Jen-Tsung Lin ,  Ben Chen ,  Eddie Chen

IPC分类号： H01J37/317 ,  G01R31/26 ,  H01L21/66

CPC分类号： H01J37/3171 ,  H01J2237/30433 ,  H01J2237/31703

摘要： A method for probing the error of energy or dosage in the high-energy ion implantation is disclosed herein. The error source that is from either the energy of ion implantation or the dosage of ion implantation non-normal is decided via the thermal signal value and the thickness of the remained oxidation layer after etching step. The error source can be decided by using different decision standards for phosphorous ion implantation or boron ion implantation. The method comprises the steps as follow: a semiconductor silicon wafer is provided as a test wafer, and an oxidation layer is then formed over the test wafer. A high-energy ion implantation, such as phosphorous ion implantation or boron ion implantation is performed. The oxidation layer is etched via an etching process in a fixing etching time. The thickness of the remained oxidation layer after the etching process is probed. A thermal probe is applied to probe the thermal wave signal from the ion-implant-induced damage. Afterward, the thermal wave signal value and the remained oxidation thickness of the high-energy ion implantation are compared with that of a preceding standard group. Then, the different decision standards created from the thermal wave signal value and the remained oxidation thickness for the high-energy phosphorous or boron ion implantation process are submitted. The error source that is from either the energy of ion implantation or the dosage of ion implantation in non-normal state can be decided via the different decision standards.

摘要翻译： 本文公开了一种用于探测高能离子注入中能量或剂量误差的方法。 通过离子注入的能量或离子注入非正常的剂量的误差源通过热信号值和蚀刻步骤后剩余的氧化层的厚度来确定。 误差源可以通过使用磷离子注入或硼离子注入的不同决策标准来决定。 该方法包括以下步骤：提供半导体硅晶片作为测试晶片，然后在测试晶片上形成氧化层。 进行高能离子注入，例如磷离子注入或硼离子注入。 在定影蚀刻时刻通过蚀刻工艺蚀刻氧化层。 探测蚀刻后剩余氧化层的厚度。 应用热探针来探测离子植入物引起的损伤的热波信号。 之后，将高能离子注入的热波信号值和剩余的氧化厚度与前面的标准组进行比较。 然后，提出了从高能磷或硼离子注入工艺的热波信号值和剩余氧化厚度产生的不同决定标准。 离子注入的能量或非正常状态下离子注入剂量的误差源可以通过不同的决策标准来决定。