Computer network switch with parallel access shared memory architecture
    1.
    发明授权
    Computer network switch with parallel access shared memory architecture 有权
    具有并行访问共享内存架构的计算机网络交换机

    公开(公告)号:US06470021B1

    公开(公告)日:2002-10-22

    申请号:US09172101

    申请日:1998-10-05

    IPC分类号: H04L1256

    摘要: A packet switch includes a multiple of bidirectional ports that are each connected by dedicated signal paths to a multiple of memory subsystems that in turn are connected to shared memory within the switch. The signal path from each port carries a fragment of a data stream between the port and each memory subsystem. The ports send and receive data stream fragments in parallel from the memory subsystems. This parallel action reduces the bandwidth required of a memory subsystem by dividing the port's data stream among the multiple memory subsystems. In storing data for forwarding to another port, each memory subsystem selects on a time division basis in parallel the data stream fragments from the same port and stores them in memory. In retrieving data from memory for a port, each memory subsystem selects on a time division basis in parallel the same port to receive the data stream fragments read from memory. The bit width of the signal paths between the ports and memory subsystems is reduced by sending smaller, individual data stream fragments between ports and memory subsystems and sending larger, aggregate data stream fragments between memory subsystems and memory. Within each memory subsystem are modules that combine individual data stream fragments into aggregate data stream fragments for storage in memory and modules that split aggregate data stream fragments read from memory into individual data stream fragments for transmission to ports.

    摘要翻译: 分组交换机包括多个双向端口,每个双向端口通过专用信号路径连接到存储器子系统的多个,其又连接到交换机内的共享存储器。 来自每个端口的信号路径携带端口和每个存储器子系统之间的数据流的片段。 端口从存储器子系统并行发送和接收数据流片段。 这种并行操作通过在多个存储器子系统之间划分端口的数据流来减少存储器子系统所需的带宽。 在存储用于转发到另一端口的数据时,每个存储器子系统并行地选择来自同一端口的数据流片段并且将它们存储在存储器中。 在从端口的存储器检索数据时,每个存储器子系统并行地选择同一端口的时分,以接收从存储器读取的数据流片段。 通过在端口和存储器子系统之间发送较小的单个数据流片段,并在存储器子系统和存储器之间发送更大的聚合数据流片段来减少端口和存储器子系统之间的信号路径的位宽度。 在每个存储器子系统内是将各个数据流片段组合成用于存储在存储器中的聚合数据流片段的模块,以及将从存储器读取的聚合数据流片段分割成用于传输到端口的各个数据流片段的模块。

    Network switching device with pipelined search engines
    2.
    发明授权
    Network switching device with pipelined search engines 失效
    具有流水线搜索引擎的网络交换设备

    公开(公告)号:US06549519B1

    公开(公告)日:2003-04-15

    申请号:US09166603

    申请日:1998-10-05

    IPC分类号: G06F1100

    摘要: A switching device for forwarding network traffic to a desired destination on a network, such as a telephone or computer network. The switching device includes multiple ports and uses a lookup table to determine which port to forward network traffic over. The lookup table includes network addresses that are maintained in ascending or descending order. The switching device includes multiple binary search engines coupled in series including one or more precursor binary search engines and a final stage binary search engine. Together, the binary search engines perform an N iteration binary search. Additionally, a single search engine can perform multiple concurrent searches so that source and destination addresses can be obtained simultaneously and without wasted memory cycles.

    摘要翻译: 一种用于将网络业务转发到诸如电话或计算机网络的网络上的期望目的地的交换设备。 交换设备包括多个端口,并使用查找表来确定哪个端口转发网络流量。 查找表包括以升序或降序维护的网络地址。 交换设备包括串联耦合的多个二进制搜索引擎,包括一个或多个前驱二进制搜索引擎和最后一级二进制搜索引擎。 二进制搜索引擎一起执行N次迭代二进制搜索。 此外,单个搜索引擎可以执行多个并发搜索,以便可以同时获得源地址和目的地址,而不会浪费内存周期。

    Network switching device with concurrent key lookups
    3.
    发明授权
    Network switching device with concurrent key lookups 失效
    具有并发密钥查找的网络交换设备

    公开(公告)号:US06453358B1

    公开(公告)日:2002-09-17

    申请号:US09776940

    申请日:2000-09-06

    IPC分类号: G06F1300

    摘要: A switching device for forwarding network traffic to a desired destination on a network, such as a telephone or computer network. The switching device includes multiple ports and uses a lookup table to determine which port to forward network traffic over. The lookup table includes network addresses that are maintained in ascending or descending order. The switching device includes multiple binary search engines coupled in series including one or more precursor binary search engines and a final stage binary search engine. Together, the binary search engines perform an N iteration binary search. Additionally, a single search engine can perform multiple concurrent searches so that source and destination addresses can be obtained simultaneously and without wasted memory cycles.

    摘要翻译: 一种用于将网络业务转发到诸如电话或计算机网络的网络上的期望目的地的交换设备。 交换设备包括多个端口,并使用查找表来确定哪个端口转发网络流量。 查找表包括以升序或降序维护的网络地址。 交换设备包括串联耦合的多个二进制搜索引擎,包括一个或多个前驱二进制搜索引擎和最后一级二进制搜索引擎。 二进制搜索引擎一起执行N次迭代二进制搜索。 此外,单个搜索引擎可以执行多个并发搜索,以便可以同时获得源地址和目的地址,而不会浪费内存周期。

    Network switching device with forwarding database tables populated based on use
    7.
    发明授权
    Network switching device with forwarding database tables populated based on use 有权
    使用转发数据库表的网络交换设备

    公开(公告)号:US06956854B2

    公开(公告)日:2005-10-18

    申请号:US10027723

    申请日:2001-12-20

    IPC分类号: H04L12/56 G06F15/173

    摘要: A switching device for forwarding network traffic to a desired destination on a network, such as a telephone or computer network. The switching device includes multiple ports and uses a lookup table containing lookup keys to determine which port to forward network traffic over. The lookup tables are populated based on use. Consequently, the lookup tables on different ports contain different addresses. By storing only addresses that a port uses, each port's lookup table is unique to that port's characteristics. Additionally, aging techniques are used on both source and destination addresses in the lookup table so that stale entries are removed and memory is conserved.

    摘要翻译: 一种用于将网络业务转发到诸如电话或计算机网络的网络上的期望目的地的交换设备。 交换设备包括多个端口,并且使用包含查找密钥的查找表来确定哪个端口转发网络流量。 查找表根据使用情况进行填充。 因此,不同端口上的查找表包含不同的地址。 通过仅存储端口使用的地址,每个端口的查找表对于该端口的特性是唯一的。 此外,在查找表中的源和目标地址都使用老化技术,以便删除陈旧的条目并保存内存。

    Memory system for controlling distribution of packet data across a switch
    8.
    发明授权
    Memory system for controlling distribution of packet data across a switch 有权
    用于控制分组数据跨交换机分发的内存系统

    公开(公告)号:US08345701B1

    公开(公告)日:2013-01-01

    申请号:US10921429

    申请日:2004-08-17

    IPC分类号: H04L12/28

    CPC分类号: H04L49/10

    摘要: A memory system for ingress processing is arranged to access multiple banks in a time interleaved fashion. Each memory bank has an associated memory bank manager, which is arranged to track the contents and egress ports associated with data stored in the memory bank. Incoming data from ingress traffic is evaluated and segregated based on criteria. One of the memory banks is identified based on the criteria, and the incoming data is stored in the identified memory bank in the next available write cycle timeslot. Data constructs in the memory bank manager are updated to indicate the location and egress port associated with the stored data. The memory bank managers submit egress transmit bids to a master scheduler, which controls access to the memory banks. The memory banks are readout in interleaved fashion such that the effective average traffic arrival rate is increased and memory bandwidth requirements are reduced.

    摘要翻译: 用于入口处理的存储器系统被布置成以交错方式接入多个存储体。 每个存储体具有相关联的存储体管理器,其被配置为跟踪与存储在存储体中的数据相关联的内容和出口。 来自入境流量的传入数据根据标准进行评估和隔离。 基于标准识别存储体之一,并且在下一个可用写周期时隙中将输入数据存储在所识别的存储体中。 存储库管理器中的数据结构被更新以指示与存储的数据相关联的位置和出口端口。 记忆库管理员将出口发送出价提交给主调度器,主控制器控制对存储体的访问。 以交错方式读出存储体,使得有效平均流量到达速率增加并且存储器带宽要求降低。

    Switching device with multistage queuing scheme
    9.
    发明授权
    Switching device with multistage queuing scheme 有权
    具有多级排队方案的交换设备

    公开(公告)号:US06920146B1

    公开(公告)日:2005-07-19

    申请号:US09166343

    申请日:1998-10-05

    摘要: In a switching device, a method of communicating data packets from sending ports to destination ports includes storing in a first stage queue packet-related data from a sending port; determining from the packet-related data which destination ports are to receive the packet-related data in the first stage queue; storing in a second stage queue associated with each determined destination port the packet-related data from the first stage queue; and using the packet-related data in the second stage queue to complete the communication of the data packet from the sending port to each determined destination port. Apparatus for practicing the method comprises a first stage queue storing packet-related data from a sending port; and a second stage queue associated with each of a set of destination ports storing the packet-related data from the first stage queue.

    摘要翻译: 在切换装置中,将数据分组从发送端口传送到目的端口的方法包括:在第一阶段中存储来自发送端口的分组相关数据; 从所述分组相关数据确定哪些目的地端口将在所述第一级队列中接收所述分组相关数据; 在与所确定的目的地端口相关联的第二阶段队列中存储来自所述第一阶段队列的分组相关数据; 并且使用第二级队列中的分组相关数据来完成数据分组从发送端口到每个确定的目的地端口的通信。 用于实施该方法的装置包括:存储来自发送端口的分组相关数据的第一级队列; 以及与存储来自第一级队列的分组相关数据的一组目的地端口中的每一个相关联的第二级队列。

    Method for detecting signal transfer errors in near real time in a digital system
    10.
    发明授权
    Method for detecting signal transfer errors in near real time in a digital system 有权
    用于在数字系统中近实时检测信号传输错误的方法

    公开(公告)号:US06553519B1

    公开(公告)日:2003-04-22

    申请号:US09166676

    申请日:1998-10-05

    IPC分类号: G06F1100

    CPC分类号: G06F11/221

    摘要: Method and apparatus for detecting signal transfer errors in a digital logic system that might occur in a transfer medium between a source device and a destination device. The method includes sending a first diagnostic signal of one or more bits from the source device through the transfer medium to the destination device; comparing the first diagnostic signal received by the destination device with a second diagnostic signal within the destination device to determine if a signal transfer error has occurred; inverting the first diagnostic signal; sending the inverted first diagnostic signal from the source device through the transfer medium to the destination device; and comparing the inverted first diagnostic signal received by the destination device with the second diagnostic signal to determine if a signal transfer error has occurred. Two embodiments of the invention are disclosed. To provide near real time detection without adding signal paths, the diagnostic signals are sent along established signal paths during a diagnostic clock cycle that is added to the normal clock cycles of the digital system.

    摘要翻译: 用于检测可能在源设备和目的地设备之间的传送介质中可能发生的数字逻辑系统中的信号传输错误的方法和设备。 该方法包括通过传送介质将一个或多个比特的第一诊断信号从源设备发送到目的设备; 将目的地设备接收的第一诊断信号与目的地设备内的第二诊断信号进行比较,以确定是否发生信号传输错误; 反转第一诊断信号; 将来自源设备的反向第一诊断信号通过传送介质发送到目的设备; 以及将由所述目的地设备接收的所述反向第一诊断信号与所述第二诊断信号进行比较,以确定是否发生信号传送错误。 公开了本发明的两个实施例。 为了在不添加信号路径的情况下提供接近实时的检测,诊断信号在被添加到数字系统的正常时钟周期的诊断时钟周期期间沿已建立的信号路径发送。