公开(公告)号：US10013373B1

公开(公告)日：2018-07-03

申请号：US15344537

申请日：2016-11-06

Applicant: BiTMICRO Networks, Inc.

Inventor： Ricardo H. Bruce ,  Bernard Sherwin Leung Chiw ,  Margaret Anne Nadonga Somera

IPC: G06F13/28 ,  G06F13/16

CPC classification number: G06F13/28 ,  G06F13/1673 ,  G06F2213/2802

Abstract: In an embodiment of the invention, a method for to use a two level linked list descriptor mechanism to pass information among flash, memory, and IO controller modules is presented. The method includes creating a first level data structure for one or more first level descriptors; creating a second level data structure for one or more second level descriptors, each second level descriptor having a pointer to tracking information that includes start information, running information, and rewind information for a data DMA; using the one or more second level descriptors, the one or more first level descriptors, and the tracking information for a data DMA; updating the tracking information during the data DMA; and updating the tracking information at the end of the data DMA.

公开(公告)号：US09501436B1

公开(公告)日：2016-11-22

申请号：US14217041

申请日：2014-03-17

Applicant: BiTMICRO Networks, Inc.

Inventor： Ricardo H. Bruce ,  Bernard Sherwin Leung Chiw ,  Margaret Anne Nadonga Somera

IPC: G06F13/28

CPC classification number: G06F13/28 ,  G06F13/1673 ,  G06F2213/2802

Abstract: In an embodiment of the invention, a method for to use a two level linked list descriptor mechanism to pass information among flash, memory, and IO controller modules is presented. The method includes creating a first level data structure for one or more first level descriptors; creating a second level data structure for one or more second level descriptors, each second level descriptor having a pointer to tracking information that includes start information, running information, and rewind information for a data DMA; using the one or more second level descriptors, the one or more first level descriptors, and the tracking information for a data DMA; updating the tracking information during the data DMA; and updating the tracking information at the end of the data DMA.

Abstract translation: 在本发明的实施例中，提出了一种使用二级链表描述符机制来在闪存，存储器和IO控制器模块之间传递信息的方法。 该方法包括为一个或多个第一级描述符创建第一级数据结构; 为一个或多个第二级描述符创建第二级数据结构，每个第二级描述符具有指向跟踪信息的指针，所述跟踪信息包括数据DMA的开始信息，运行信息和倒带信息; 使用一个或多个第二级描述符，一个或多个第一级描述符和数据DMA的跟踪信息; 在数据DMA期间更新跟踪信息; 并在数据DMA结束时更新跟踪信息。