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公开(公告)号：US11232846B2
公开(公告)日：2022-01-25
申请号：US16191746
申请日：2018-11-15
Inventor： Zhuo Xu , Yuanbo Zhang , Yajie Bai , Heecheol Kim , Peng Liang , Hailong Wu , Yi Dan
Abstract: The present disclosure provides a gate drive unit, a driving method thereof and a gate drive circuit. The gate drive unit includes a shift register and a plurality of output control modules. Each of the output control modules is connected to a corresponding clock scanning signal line and a corresponding first scanning signal output terminal, respectively. Each of the output control modules includes a first output control submodule and an output reset submodule. The first output control submodule is connected to a signal output terminal of the shift register, the corresponding clock scanning signal line and the corresponding first scanning signal output terminal, and configured to send a clock scanning signal of the corresponding clock scanning signal line to the corresponding first scanning signal output terminal, under control of a signal outputted by the signal output terminal of the shift register.
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公开(公告)号：US10217427B2
公开(公告)日：2019-02-26
申请号：US15513952
申请日：2016-02-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yuanbo Zhang , Seungwoo Han , Xing Yao
IPC: G09G3/36
Abstract: The present application relates to a gate drive unit circuit, comprising an input unit, an output unit, a pull-up node control unit, a pull-down node control unit and a pull-down unit. The input unit is used for transmitting a signal inputted by a first input signal terminal to a first node. The pull-up node control unit is used for transmitting a signal inputted by a first voltage terminal or a second voltage terminal to a pull-up node. The output unit is used for transmitting a signal inputted by a first control signal terminal to an output signal terminal. The pull-down node control unit is used for transmitting the input inputted by the first voltage terminal or the second voltage terminal to a pull-down node. The pull-down unit is used for transmitting a signal inputted by the second voltage terminal to the output signal terminal.
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3.发明授权公开(公告)号：US10210944B2
公开(公告)日：2019-02-19
申请号：US15163913
申请日：2016-05-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Seung Woo Han , Yuanbo Zhang
Abstract: An inverter and a method for driving the inverter, a gate driver on array (GOA) unit, a GOA circuit and a display device relate to a technical field of display, and are proposed to supply stable inverter output signal. The inverter comprises a control module and an output module. The control module is configured to control a voltage at a control node under the control of a first clock signal at a first clock signal terminal, a second clock signal at a second clock signal terminal, an input signal at an input terminal and voltages at a first level terminal and a second level terminal. The output module is configured to set a voltage at the output terminal to the voltage at the first level terminal or the voltage at the second level terminal under the control of the control node and the input signal at the input terminal.
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公开(公告)号：US10050061B2
公开(公告)日：2018-08-14
申请号：US14402266
申请日：2013-12-10
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yuanbo Zhang , Wei Qin , Seung Woo Han , Ruoyu Ma
IPC: G02F1/1343 , H01L27/12
Abstract: An array substrate, a manufacturing method of the array substrate and a display device including the array substrate are disclosed. The array substrate includes a substrate (1), a common electrode layer (401) located on the substrate (1) and a conductive layer (2) provided on a surface of the substrate (1), the conductive layer (2) and the common electrode layer (401) are electrically connected in parallel. The common electrode and the conductive layer are formed into a parallel structure, so that the resistance can be decreased, and in turn, crosstalk, greenish and other phenomenon of the array substrate are reduced, thereby promoting the picture quality of the display device.
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公开(公告)号：US09905155B2
公开(公告)日：2018-02-27
申请号：US14906781
申请日：2015-07-24
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yuanbo Zhang , Seungwoo Han , Haoliang Zheng
CPC classification number: G09G3/2092 , G09G2300/0809 , G09G2310/0267 , G09G2310/0286 , G11C19/28 , G11C19/287
Abstract: The present disclosure provides a gate driver circuit including at least one set of clock signal lines and multiple levels of shift registers arranged in a cascaded manner. Each set of the clock signal lines includes two clock signal lines. The multiple levels of shift registers is divided into at least one set, and each set of the clock signal lines corresponds to a set of the shift registers. One clock signal line in each set of the clock signal lines is connected to a resetting signal input end of a last-level shift register in the set of the shift registers corresponding to the set of the clock signal lines. The present disclosure further provides an array substrate, a display device and a method for driving the gate driver circuit.
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Patent Agency Ranking
公开(公告)号：US09805683B2
公开(公告)日：2017-10-31
申请号：US14906475
申请日：2015-08-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xing Yao , Seungwoo Han , Yuanbo Zhang
CPC classification number: G09G3/3677 , G09G3/20 , G09G3/3696 , G09G2300/0809 , G09G2310/0267 , G09G2310/0286 , G09G2330/021
Abstract: The present invention discloses a Gate-driver-On-Array (GOA) circuit and the driving method thereof and a display device. The GOA circuit comprises a driving module, a low-resolution module and at least two high-resolution modules, the driving module being connected with the low-resolution module and the at least two high-resolution modules respectively; wherein, the driving module is used to output control signal to the low-resolution module and the high-resolution modules; the low-resolution module is used to output a low-resolution signal to at least two rows of pixels under the control of the control signal during low-resolution display; and each high-resolution module is used to output a high-resolution signal to corresponding one row of pixels under the control of the control signal during high-resolution display. The GOA circuit of the present invention may be used to drive multiple rows of pixels and implement the switching between low resolution display and high resolution display.
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公开(公告)号：US09626036B2
公开(公告)日：2017-04-18
申请号：US14435501
申请日：2014-04-22
Applicant: BOE Technology Group Co., Ltd.
Inventor： Yuanbo Zhang , Wenbo Li , Han-Seung Woo , Mi Zhang
IPC: G06F3/041
CPC classification number: G06F3/0416 , G06F3/041
Abstract: An embodiment of the present invention provides a touch circuit, a method for driving a touch circuit and a touch display apparatus, which may achieve a touch display apparatus with a narrower frame. The touch circuit includes: a touch signal input module having a first output end for outputting a touch drive triggering signal and a second output end for outputting a touch clock signal; a plurality of touch control sub-circuits cascaded to each other, each of which has a first input end for inputting the touch drive triggering signal and a second input end for inputting the touch clock signal; and a plurality of touch electrodes, wherein the first output end and the second output end of the touch signal input module are connected to at least one cascade of the touch control sub-circuits and configured to output the touch drive triggering signal and the touch clock signal to the at least one cascade of the touch control sub-circuits, and wherein the touch control sub-circuits are configured to drive the touch electrodes when they are triggered by the touch drive triggering signal and the touch clock signal.
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8.发明申请GATE DRIVING CIRCUIT AND A DRIVING METHOD THEREOF, AS WELL AS A DISPLAY DEVICE 有权门驱动电路及其驱动方法，作为显示设备公开(公告)号：US20170010731A1
公开(公告)日：2017-01-12
申请号：US14435739
申请日：2014-07-31
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yuanbo Zhang , Jiayang Zhao , Seungwoo Han , Xiangxiang Zou
CPC classification number: G06F3/0416 , G06F3/041 , G06F3/0412 , G06F3/044 , G06F2203/04104 , G09G3/20 , G09G3/3677 , G09G2310/0286 , G09G2310/065 , G11C19/28
Abstract: The present invention provides a gate driving circuit and a driving method thereof, a display device, which relates to the field of display technology. The gate driving circuit may comprise a plurality of mutually cascaded shift register units and a pre-charging unit, the gate row drive scanning and touch control scanning of the plurality of mutually cascaded shift register units are performed alternately. By additionally arranging a pre-charging unit connected with the corresponding first stage of shift register unit when the gate row drive scanning is performed again after the touch control scanning is accomplished, the first stage of shift register unit can be pre-charged during the touch control scanning. In this way, the electric leakage phenomenon of the pull-up control node (PU point) of the corresponding first stage of shift register unit when the gate row drive scanning is performed again after the touch control scanning is accomplished due to a relatively long touch control scanning time interval between outputs of two rows of shift register units is avoided, thereby avoiding the defect of insufficient charging rate of row of pixels while ensuring touch control scanning of high report rate.
Abstract translation: 本发明提供一种与显示技术领域相关的门驱动电路及其驱动方法，显示装置。 栅极驱动电路可以包括多个相互级联的移位寄存器单元和预充电单元，交替执行多个相互级联的移位寄存器单元的栅极行驱动扫描和触摸控制扫描。 通过在完成触摸控制扫描之后再次执行栅极行驱动扫描时，另外布置与相应的第一级移位寄存器单元连接的预充电单元，可以在触摸期间预充电第一级移位寄存器单元 控制扫描。 以这种方式，当触摸控制扫描完成后，由于相对较长的触摸而完成了栅极行驱动扫描时，对应的第一级移位寄存器单元的上拉控制节点（PU点）的漏电现象 避免了两排移位寄存器单元的输出之间的控制扫描时间间隔，从而避免了像素行的充电率不足的缺陷，同时确保了高报告率的触摸控制扫描。
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9.发明申请公开(公告)号：US20150179669A1
公开(公告)日：2015-06-25
申请号：US14355352
申请日：2013-06-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Wei Qin , Jiayang Zhao , Yuanbo Zhang , Xiangxiang Zou
IPC: H01L27/12 , H01L21/3213 , H01L21/308 , H01L29/786 , H01L29/66
CPC classification number: H01L27/124 , H01L21/0272 , H01L21/3081 , H01L21/32133 , H01L21/32139 , H01L27/1222 , H01L27/1288 , H01L29/66765 , H01L29/78669
Abstract: A method of manufacturing an array substrate, an array substrate and a display device are provided. The method of manufacturing the array substrate includes: forming a pattern of a gate metal layer including a gate line and a gate electrode and preserving photoresist at a position on the pattern of the gate metal layer corresponding to a gate lead hole; sequentially forming a gate insulating thin film, a semiconductor thin film and a source/drain metal thin film; removing the photoresist preserved at the position on the pattern of the gate metal layer corresponding to the gate lead hole, and forming the gate lead hole; forming a pattern of a source/drain metal layer including a source electrode, a drain electrode and a data line and a semiconductor layer; and forming a pattern including a pixel electrode layer and a channel.
Abstract translation: 提供一种制造阵列基板，阵列基板和显示装置的方法。 制造阵列基板的方法包括：在对应于栅极引线孔的栅极金属层的图案上的位置处形成包括栅极线和栅电极的栅极金属层的图案，并保留光致抗蚀剂; 依次形成栅极绝缘薄膜，半导体薄膜和源极/漏极金属薄膜; 去除保留在对应于栅极引线孔的栅极金属层的图案上的位置处的光致抗蚀剂，并形成栅极引线孔; 形成包括源电极，漏电极和数据线以及半导体层的源极/漏极金属层的图案; 以及形成包括像素电极层和沟道的图案。
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公开(公告)号：US10892028B2
公开(公告)日：2021-01-12
申请号：US16105274
申请日：2018-08-20
Inventor： Yuanbo Zhang , Xiaolin Wang , Zhuo Xu , Shuai Chen , Zhulin Liu
Abstract: A shift register includes a pull-up control circuit, a pull-up circuit, a pull-down control circuit, a pull-down circuit, and a reset circuit. The pull-down circuit is connected to the pull-down node, the pull-up node, a second control terminal, a first voltage terminal, and a signal output terminal, and is configured to pull down potentials of the pull-up node and the signal output terminal to a potential of the first voltage terminal under the control of the pull-down node; moreover, the pull-down circuit is further configured to pull down potentials of the pull-up node and the signal output terminal to a potential of the first voltage terminal under the control of a signal from the second control terminal.
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