公开(公告)号：US07017428B2

公开(公告)日：2006-03-28

申请号：US10728544

申请日：2003-12-04

申请人： Byoung-jun Min ,  Jeong-ho Bang ,  Hyun-seop Shim ,  Hyo-geun Chae

发明人： Byoung-jun Min ,  Jeong-ho Bang ,  Hyun-seop Shim ,  Hyo-geun Chae

IPC分类号： G01M19/00

CPC分类号： G01R31/2893 ,  G01R1/0483 ,  G01R31/2806

摘要： A test kit for a semiconductor package and a method for testing the semiconductor package using the same are provided. The test kit for a semiconductor package includes a pick-and-place tool for picking up and loading/unloading the semiconductor package, a head assembly having a package guider and a socket guider, and a socket which is positioned under the head assembly. The socket guider performs a pre-alignment function for a correct operation of the package guider, before the package guider starts operating. The package guider aligns the semiconductor package.

摘要翻译： 提供了一种用于半导体封装的测试套件以及使用其的半导体封装测试方法。 用于半导体封装的测试套件包括用于拾取和加载/卸载半导体封装的拾取和放置工具，具有封装导向器和插座导向器的头部组件以及位于头部组件下方的插座。 套件导向器在包导向器开始操作之前执行用于正确操作包导向器的预对准功能。 封装导向器对准半导体封装。

公开(公告)号：US06462534B2

公开(公告)日：2002-10-08

申请号：US09805212

申请日：2001-03-14

申请人： Seong-goo Kang ,  Byoung-jun Min ,  Hyo-geun Chae ,  Jeong-ho Bang

发明人： Seong-goo Kang ,  Byoung-jun Min ,  Hyo-geun Chae ,  Jeong-ho Bang

IPC分类号： G01R3102

CPC分类号： G01R31/2867 ,  G01R1/0408 ,  H01L2224/75 ,  H01L2224/81

摘要： A loader of semiconductor package burn-in test equipment allows a test socket to be commonly used for semiconductor packages of all sizes. The loader includes a vacuum suction head for picking semiconductor packages to be tested, and a package guider for ensuring that semiconductor packages of any size will be aligned with the test socket. As the semiconductor package is positioned over the test socket by the vacuum suction head of the loader, guide surfaces of the package guider are brought inwardly into guide positions at which the surfaces extend just beneath the vacuum suction head. Any semiconductor package that is not in alignment with the test socket while being held by the vacuum suction head is guided by the guides surfaces into alignment once the vacuum suction is turned off and the package falls from the vacuum suction head. Thus, the package guider serves as an adaptor, eliminating the need for several test sockets having respective adaptors for different sizes of semiconductor packages.

摘要翻译： 半导体封装老化测试设备的装载机允许测试插座常用于各种尺寸的半导体封装。 装载机包括用于拾取待测试的半导体封装的真空吸头，以及用于确保任何尺寸的半导体封装将与测试插座对准的封装导向器。 当半导体封装通过装载机的真空吸头位于测试插座上方时，封装引导件的引导表面向内进入引导位置，在该位置处表面正好在真空抽吸头的正下方延伸。 在真空抽吸被关闭并且包装从真空抽吸头落下的情况下，由真空吸头保持的不与测试插座对准的任何半导体封装被引导面对引导。 因此，封装导向器用作适配器，消除了对具有用于不同尺寸的半导体封装的相应适配器的多个测试插座的需要。

公开(公告)号：US06489790B1

公开(公告)日：2002-12-03

申请号：US09519720

申请日：2000-03-07

申请人： Young-soo An ,  Jae-Il Lee ,  Hyo-geun Chae ,  Jeong-ho Bang

发明人： Young-soo An ,  Jae-Il Lee ,  Hyo-geun Chae ,  Jeong-ho Bang

IPC分类号： G01R3102

CPC分类号： G01R1/073 ,  G01R1/0483

摘要： A socket for testing a BGA package capable of avoiding problems like deformation of external terminals of the BGA package or failing to detect a defective BGA package and a test method using the socket are provided. The socket for testing a BGA package connects solder balls (or solder bumps) as external terminals of the BGA package via a mesh, a pressure conductive rubber (PCR) as a middle connection unit, and a channel connection means of a socket board. A plane board having POGO pins or a printed circuit pattern can be used for the channel connection means.

摘要翻译： 提供一种用于测试BGA封装的插座，其能够避免诸如BGA封装的外部端子的变​​形或不能检测到有缺陷的BGA封装的问题以及使用插座的测试方法。 用于测试BGA封装的插座通过网格，作为中间连接单元的压力导电橡胶（PCR）和插座板的通道连接装置将焊球（或焊料凸块）作为BGA封装的外部端子连接。 具有POGO引脚或印刷电路图案的平板可用于通道连接装置。

公开(公告)号：US06396294B2

公开(公告)日：2002-05-28

申请号：US09430997

申请日：1999-11-01

申请人： Young-soo An ,  Young-moon Lee ,  Jae-il Lee ,  Hyo-geun Chae

发明人： Young-soo An ,  Young-moon Lee ,  Jae-il Lee ,  Hyo-geun Chae

IPC分类号： G01R104

CPC分类号： G01R1/0466

摘要： A socket pin and a socket for electrical testing of a semiconductor package suppress electrical open/short defects due to contact failure and reduce manufacturing costs. The socket pin includes: an upper portion that connects to a lead of the semiconductor package, for exchanging a signal between the semiconductor package and a tester; a body connected to the upper portion, for buffering at two points, a downward force applied by the lead of the semiconductor package to the upper portion; a lower portion connected to the body of the socket pin, the lower portion being elastically durable to the force from the upper portion and the body; and a lower socket pin connected to the lower portion, which acts as a path for transmitting or receiving an electrical signal.

摘要翻译： 用于半导体封装的电气测试的插座销和插座抑制由于接触故障引起的电开路/短路缺陷并降低制造成本。 插座销包括：连接到半导体封装的引线的上部，用于在半导体封装和测试器之间交换信号; 连接到上部的主体，用于在两个点处缓冲由半导体封装的引线施加到上部的向下的力; 连接到所述插座销的主体的下部，所述下部弹性地抵抗来自所述上部和所述主体的力; 以及连接到下部的下插座销，其作为用于发送或接收电信号的路径。