公开(公告)号：US12182485B1

公开(公告)日：2024-12-31

申请号：US16209885

申请日：2018-12-04

Applicant: CADENCE DESIGN SYSTEMS, INC.

Inventor： Mitchell G. Poplack ,  Christopher Coffman ,  Hitesh Gannu

IPC: G06F30/33 ,  G06F9/455 ,  G06F30/331 ,  G06F30/3323 ,  G06F30/398 ,  G06F115/02 ,  G06F117/08

Abstract: A shared memory is provided between simulation processors and emulation processors within an emulation chip. The shared memory is configured to enable the simulation processors and the emulation processors to exchange simulation data and emulation data respectively with each other during simulation and emulation operations. The simulation processors and the emulation processors may update their respective simulation and emulation operations in response to the simulation data and the emulation data exchanged via the shared memory.

公开(公告)号：US10536553B1

公开(公告)日：2020-01-14

申请号：US14846460

申请日：2015-09-04

Applicant: CADENCE DESIGN SYSTEMS, INC.

Inventor： Mitchell G. Poplack ,  Sharon Mutchnik ,  Hitesh Gannu ,  Ramesh Mogili

IPC: G06F13/00 ,  H04L29/08

Abstract: An emulation system comprises an outband traffic generating device comprising at least one field programmable gate array coupled to a host system. The outband traffic generating device is configured to transfer one or more bits via an outband channel to a register of an inband traffic generating device. The inband traffic generating device comprises at least one field programmable gate array coupled to a target system. The inband traffic generating device is configured to transfer the one or more bits via an inband channel to the outband traffic generating device.

公开(公告)号：US10303230B1

公开(公告)日：2019-05-28

申请号：US15339279

申请日：2016-10-31

Applicant: CADENCE DESIGN SYSTEMS, INC.

Inventor： Mitchell G. Poplack ,  Yuhei Hayashi ,  Beshara Elmufdi ,  Hitesh Gannu

IPC: G06F1/00 ,  G06F1/26 ,  G06F9/48 ,  G06F9/30

Abstract: Disclosed herein are systems and methods to generate, by a compiling processor, one or more sets of one or more execution instructions responsive to compiling a netlist file. The method further includes storing, by the compiling processor, a set of execution instructions into an instruction memory of an execution processor. The method further includes generating, by a compiling processor, a set of one or more keephot instructions for the execution processor based upon the set of execution instructions stored into the instruction memory of the execution processor. The method further includes storing, by a compiling processor, the set of keephot instructions into the instruction memory of the execution processor.