公开(公告)号：US20190281557A1

公开(公告)日：2019-09-12

申请号：US16278153

申请日：2019-02-17

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Fumiaki OCHIAI ,  Yoshinori ASAMI ,  Yohei KAWAGUCHI ,  Katsuhiko OBATA

IPC: H04W52/02 ,  H04B1/06

Abstract: An electronic apparatus includes a first power feeder, a positioning-satellite-signal receiver, and a CPU. The first power feeder receives power from an external device and feeds the power to a secondary battery. The positioning-satellite-signal receiver receives a satellite signal transmitted by a positioning satellite. The CPU limits a receiving operation of the positioning-satellite-signal receiver when the first power feeder is receiving the power from the external device.

公开(公告)号：US20240152099A1

公开(公告)日：2024-05-09

申请号：US18412616

申请日：2024-01-15

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Fumiaki OCHIAI ,  Yoshinori ASAMI ,  Yohei KAWAGUCHI ,  Katsuhiko OBATA

IPC: G04G19/06 ,  G01R19/165 ,  G01R31/36 ,  G04C10/04 ,  H01M10/48 ,  H02J7/00

CPC classification number: G04G19/06 ,  G01R19/16542 ,  G01R31/36 ,  G04C10/04 ,  H01M10/486 ,  H02J7/0048 ,  H02J7/007 ,  H02J7/0071 ,  H02J7/007194 ,  H02J7/35

Abstract: An electronic apparatus includes a secondary battery, a first power feeder, a second power feeder, and a processor. The first power feeder feeds power to the secondary battery. The second power feeder feeds power to the secondary battery at a current larger than a current fed by the first power feeder. The processor detects a voltage of the secondary battery, and determines a remaining power of the secondary battery based on a comparison of the detected voltage with first or second reference values. The first reference value is a predetermined value set in accordance with the current fed by the first power feeder. The second reference value is a predetermined value set in accordance with the current fed by the second power feeder, and is higher than the first reference value.

公开(公告)号：US20190280517A1

公开(公告)日：2019-09-12

申请号：US16278523

申请日：2019-02-18

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Fumiaki OCHIAI ,  Yoshinori ASAMI ,  Yohei KAWAGUCHI ,  Katsuhiko OBATA

IPC: H02J7/35 ,  H02J7/00 ,  G01R19/165 ,  G01R31/3842 ,  H01M10/48 ,  G04G19/06

Abstract: An electronic timepiece includes a secondary battery, a first power feeder, a second power feeder, and a processor. The first power feeder feeds power to the secondary battery. The second power feeder feeds power to the secondary battery at a current larger than a current fed by the first power feeder. The processor determines remaining power of the secondary battery based on different references that are a reference of when the first power feeder is feeding the power to the secondary battery and a reference of when the second power feeder is feeding the power to the secondary battery.

公开(公告)号：US20210351596A1

公开(公告)日：2021-11-11

申请号：US17382790

申请日：2021-07-22

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Fumiaki OCHIAI ,  Yoshinori ASAMI ,  Yohei KAWAGUCHI ,  Katsuhiko OBATA

IPC: H02J7/00 ,  G04G19/06 ,  H01M10/48 ,  G01R19/165 ,  G01R31/36

Abstract: An electronic timepiece includes a secondary battery, a first power feeder, a second power feeder, and a processor. The first power feeder feeds power to the secondary battery. The second power feeder feeds power to the secondary battery at a current larger than a current fed by the first power feeder. The processor determines remaining power of the secondary battery based on different references that are a reference of when the first power feeder is feeding the power to the secondary battery and a reference of when the second power feeder is feeding the power to the secondary battery.

公开(公告)号：US20190295486A1

公开(公告)日：2019-09-26

申请号：US16358222

申请日：2019-03-19

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Takahiro ONO ,  Fumiaki OCHIAI ,  Yoshinori ASAMI ,  Eiji YAMAKAWA

IPC: G09G3/36 ,  G04G9/12

Abstract: A liquid crystal control circuit includes: a first terminal that outputs a rewriting signal for rewriting a plurality of pixels; a second terminal that periodically designates a start timing of the rewriting signal; a third terminal that outputs a polarity signal for designating polarity of AC voltage; a first circuit that identifies a next second inversion timing of any first inversion timing at which the polarity is inverted; a calculator that calculates a first start timing after the first inversion timing based on the start timing; a second circuit that determines whether the second inversion timing is within a period from a predetermined time before the first start timing to the first start timing; and an inversion unit that inverts polarity of the polarity signal after the rewriting signal starting from the first start timing is stopped, when the second inversion timing is within the period.

公开(公告)号：US20190295485A1

公开(公告)日：2019-09-26

申请号：US16357979

申请日：2019-03-19

Applicant: CASIO COMPUTER CO., LTD.

Inventor： Takahiro ONO ,  Fumiaki OCHIAI ,  Yoshinori ASAMI ,  Eiji YAMAKAWA

IPC: G09G3/36 ,  G04G9/12

Abstract: A liquid crystal control circuit is provided for driving a MIP liquid crystal panel. The MIP liquid crystal panel has a plurality of pixels, each of which includes a memory element and a display element. The memory element holds electric potential depending on an image signal. The display element is applied voltage depending on the electric potential which the memory element holds. The liquid crystal control circuit includes an inversion unit that inverts polarity of AC voltage in a first mode in which an enable signal is output. The AC voltage being is applied to the display element in synchronization with outputting of the enable signal. The enable signal activates the image signal output to the MIP liquid crystal panel.