Method and apparatus for power gating hardware components in a chip device
    1.
    发明授权
    Method and apparatus for power gating hardware components in a chip device 有权
    用于芯片器件中硬件组件的电源门控的方法和装置

    公开(公告)号:US09483100B2

    公开(公告)日:2016-11-01

    申请号:US14193899

    申请日:2014-02-28

    申请人: Cavium, Inc.

    IPC分类号: G06F1/32 G06F1/00 H03K17/00

    摘要: According to at least one example embodiment, a semiconductor device is configured to gate power supply to a hardware component through a transistor coupled to the hardware component. The transistor is operated by a controller in a manner to limit electric current dissipated to the hardware component during a transition period. The controller is configured to gradually turn on, or off, the hardware component during a transition period by controlling at least one input signal to the transistor. Gradual turning on, or off, of the hardware component reduces electric current leakage through the hardware component and diminishes any potential disturbance to a ground reference coupled to the hardware component.

    摘要翻译: 根据至少一个示例性实施例,半导体器件被配置为通过耦合到硬件部件的晶体管栅极向硬件部件供电。 晶体管由控制器以在过渡期间限制消耗到硬件部件的电流的方式来操作。 控制器被配置为通过控制至少一个输入到晶体管的输入信号来在转换期间逐渐打开或关闭硬件组件。 硬件组件的逐渐打开或关闭可减少硬件组件的电流泄漏,并减少对耦合到硬件组件的接地参考电压的任何潜在干扰。

    CONTENT SEARCH MECHANISM USING FINITE AUTOMATA
    2.
    发明申请
    CONTENT SEARCH MECHANISM USING FINITE AUTOMATA 有权
    内容使用有限自动化搜索机制

    公开(公告)号:US20160232210A1

    公开(公告)日:2016-08-11

    申请号:US15134919

    申请日:2016-04-21

    申请人: Cavium, Inc.

    IPC分类号: G06F17/30

    摘要: An improved content search mechanism uses a graph that includes intelligent nodes avoids the overhead of post processing and improves the overall performance of a content processing application. An intelligent node is similar to a node in a DFA graph but includes a command. The command in the intelligent node allows additional state for the node to be generated and checked. This additional state allows the content search mechanism to traverse the same node with two different interpretations. By generating state for the node, the graph of nodes does not become exponential. It also allows a user function to be called upon reaching a node, which can perform any desired user tasks, including modifying the input data or position.

    摘要翻译: 改进的内容搜索机制使用包括智能节点的图避免了后处理的开销,并提高了内容处理应用的整体性能。 智能节点类似于DFA图中的节点,但包含一个命令。 智能节点中的命令允许生成和检查节点的附加状态。 这种附加状态允许内容搜索机制以两种不同的解释遍历相同的节点。 通过生成节点的状态,节点的图形不会变成指数。 它还允许在到达节点时调用用户功能,节点可以执行任何所需的用户任务,包括修改输入数据或位置。

    Method and Apparatus for Managing Global Chip Power on a Multicore System on Chip

    公开(公告)号:US20170228007A1

    公开(公告)日:2017-08-10

    申请号:US15499531

    申请日:2017-04-27

    申请人: Cavium, Inc.

    IPC分类号: G06F1/32 G06F1/28

    摘要: According to at least one example embodiment, a method and corresponding apparatus for controlling power in a multi-core processor chip include: accumulating, at a controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip. A global power threshold is determined based on a cumulative power estimate, the cumulative power estimate being determined based at least in part on the one or more power estimates accumulated. The controller causes power consumption at each of the core processors to be controlled based on the determined global power threshold. The controller may directly control power consumption at the core processors or may command the core processors to do so.

    Content search mechanism that uses a deterministic finite automata (DFA) graph, a DFA state machine, and a walker process
    7.
    发明授权
    Content search mechanism that uses a deterministic finite automata (DFA) graph, a DFA state machine, and a walker process 有权
    使用确定性有限自动机(DFA)图,DFA状态机和Walker进程的内容搜索机制

    公开(公告)号:US08818921B2

    公开(公告)日:2014-08-26

    申请号:US14040323

    申请日:2013-09-27

    申请人: Cavium, Inc.

    IPC分类号: G06F15/18

    摘要: An improved content search mechanism uses a graph that includes intelligent nodes avoids the overhead of post processing and improves the overall performance of a content processing application. An intelligent node is similar to a node in a DFA graph but includes a command. The command in the intelligent node allows additional state for the node to be generated and checked. This additional state allows the content search mechanism to traverse the same node with two different interpretations. By generating state for the node, the graph of nodes does not become exponential. It also allows a user function to be called upon reaching a node, which can perform any desired user tasks, including modifying the input data or position.

    摘要翻译: 改进的内容搜索机制使用包括智能节点的图避免了后处理的开销,并提高了内容处理应用的整体性能。 智能节点类似于DFA图中的节点,但包含一个命令。 智能节点中的命令允许生成和检查节点的附加状态。 这种附加状态允许内容搜索机制以两种不同的解释遍历相同的节点。 通过生成节点的状态,节点的图形不会变成指数。 它还允许在到达节点时调用用户功能,节点可以执行任何所需的用户任务,包括修改输入数据或位置。

    Dynamically adjusting supply voltage based on monitored chip temperature
    8.
    发明授权
    Dynamically adjusting supply voltage based on monitored chip temperature 有权
    根据监测的芯片温度动态调整电源电压

    公开(公告)号:US09507369B2

    公开(公告)日:2016-11-29

    申请号:US14040431

    申请日:2013-09-27

    申请人: Cavium, Inc.

    IPC分类号: G05F5/00 G05F1/46

    CPC分类号: G05F5/00 G05F1/463

    摘要: In an embodiment, a method includes monitoring a temperature of a semiconductor chip and adjusting a supply voltage to the semiconductor chip based on the monitored temperature. The temperature may be monitored by a temperature sensor located on-chip or off-chip. Adjusting the supply voltage includes increasing the supply voltage as a function of the monitored temperature decreasing. The increase to the supply voltage occurs only if the monitored temperature is below a threshold temperature. The supply voltage adjustment is determined by a linear relationship having a negative slope with temperature.

    摘要翻译: 在一个实施例中,一种方法包括监视半导体芯片的温度并基于所监视的温度调整对半导体芯片的电源电压。 温度可以由位于片上或芯片外的温度传感器监测。 调整电源电压包括随着监测温度的降低而增加电源电压。 只有当监测到的温度低于阈值温度时,电源电压的增加才会发生。 电源电压调整由具有负斜率与温度的线性关系确定。

    IMPLEMENTING 128-BIT SIMD OPERATIONS ON A 64-BIT DATAPATH
    9.
    发明申请
    IMPLEMENTING 128-BIT SIMD OPERATIONS ON A 64-BIT DATAPATH 审中-公开
    在64位DATAPATH上实现128位SIMD操作

    公开(公告)号:US20160140079A1

    公开(公告)日:2016-05-19

    申请号:US14940585

    申请日:2015-11-13

    申请人: Cavium, Inc.

    IPC分类号: G06F15/80 G06F9/30

    摘要: A method of implementing a processor architecture and corresponding system includes operands of a first size and a datapath of a second size. The second size is different from the first size. Given a first array of registers and a second array of registers, each register of the first and second arrays being of the second size, selecting a first register and corresponding second register from the first array and the second array, respectively, to perform operations of the first size. This allows a user, who is interfacing with the hardware processor through software, to provide data of the datapath bit-width instead of the register bit-width. Advantageously, the user is agnostic to the size of the registers.

    摘要翻译: 实现处理器体系结构和对应系统的方法包括具有第二大小的第一大小和数据路径的操作数。 第二大小与第一大小不同。 给定第一阵列寄存器和第二寄存器阵列,第一和第二阵列的每个寄存器分别为第二大小,从第一阵列和第二阵列分别选择第一寄存器和对应的第二寄存器,以执行 第一大小。 这允许通过软件与硬件处理器连接的用户提供数据路径位宽而不是寄存器位宽的数据。 有利地,用户对寄存器的大小是不可知的。

    Method And Apparatus For Power Gating Hardware Components In A Chip Device
    10.
    发明申请
    Method And Apparatus For Power Gating Hardware Components In A Chip Device 有权
    用于芯片器件中的电源门控硬件组件的方法和装置

    公开(公告)号:US20150248154A1

    公开(公告)日:2015-09-03

    申请号:US14193899

    申请日:2014-02-28

    申请人: Cavium, Inc.

    IPC分类号: G06F1/32

    摘要: According to at least one example embodiment, a semiconductor device is configured to gate power supply to a hardware component through a transistor coupled to the hardware component. The transistor is operated by a controller in a manner to limit electric current dissipated to the hardware component during a transition period. The controller is configured to gradually turn on, or off, the hardware component during a transition period by controlling at least one input signal to the transistor. Gradual turning on, or off, of the hardware component reduces electric current leakage through the hardware component and diminishes any potential disturbance to a ground reference coupled to the hardware component.

    摘要翻译: 根据至少一个示例性实施例,半导体器件被配置为通过耦合到硬件部件的晶体管栅极向硬件部件供电。 晶体管由控制器以在过渡期间限制消耗到硬件部件的电流的方式来操作。 控制器被配置为通过控制至少一个输入到晶体管的输入信号来在转换期间逐渐打开或关闭硬件组件。 硬件组件的逐渐打开或关闭可减少硬件组件的电流泄漏,并减少对耦合到硬件组件的接地参考电压的任何潜在干扰。