公开(公告)号：US11252811B2

公开(公告)日：2022-02-15

申请号：US16743371

申请日：2020-01-15

Applicant: CISCO TECHNOLOGY, INC.

Inventor： Joel Richard Goergen ,  Jessica Kiefer ,  Ashley Julia Maker Erickson ,  Yi Tang ,  M. Baris Dogruoz ,  Elizabeth Ann Kochuparambil ,  Shobhana Punjabi

IPC: H05K1/02 ,  H01R12/71 ,  H05K7/20

Abstract: In one embodiment, an apparatus includes a substrate comprising a first surface and a second surface opposite to the first surface, an integrated circuit attached to the first surface of the substrate, and a cold plate attached to the second surface of the substrate with an electrical path extending through the cold plate for transmitting power from a power component connected to the cold plate, to the integrated circuit.

公开(公告)号：US20210382967A1

公开(公告)日：2021-12-09

申请号：US16943423

申请日：2020-07-30

Applicant: Cisco Technology, Inc.

Inventor： Joel Goergen ,  Sam Gupta ,  Dylan Thomas Walker ,  Chirag K. Shroff ,  Christopher Shannon Gourley ,  Rachel Marie Weeks ,  Elizabeth Ann Kochuparambil ,  Ronald Lee Shaffer II

IPC: G06F21/31 ,  H04L9/32 ,  G06K9/00 ,  H05K1/03

Abstract: An apparatus includes a printed circuit board (PCB) that includes a woven glass laminate layer. The woven glass laminate layer includes a plurality of glass bundles woven together, where a marker structure including at least one marker is defined within the woven glass laminate layer. A security chip is coupled with the PCB and includes memory that stores an authentication identifier of the PCB, where the authentication ID includes a representation of the marker structure.

公开(公告)号：US20210219415A1

公开(公告)日：2021-07-15

申请号：US16743371

申请日：2020-01-15

Applicant: CISCO TECHNOLOGY, INC.

Inventor： Joel Richard Goergen ,  Jessica Kiefer ,  Ashley Julia Maker Erickson ,  Yi Tang ,  M. Baris Dogruoz ,  Elizabeth Ann Kochuparambil ,  Shobhana Punjabi

IPC: H05K1/02 ,  H05K7/20 ,  H01R12/71

Abstract: In one embodiment, an apparatus includes a substrate comprising a first surface and a second surface opposite to the first surface, an integrated circuit attached to the first surface of the substrate, and a cold plate attached to the second surface of the substrate with an electrical path extending through the cold plate for transmitting power from a power component connected to the cold plate, to the integrated circuit.