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公开(公告)号：US20250151198A1
公开(公告)日：2025-05-08
申请号：US18434943
申请日：2024-02-07
Applicant: Cisco Technology, Inc.
Inventor： Joel Richard Goergen , Elizabeth Kochuparambil , Scott Hinaga , Kameron Rose Hurst , Mike Sapozhnikov , Shobhana Punjabi , David Nozadze , Marco Croci
Abstract: Techniques to move high current power distribution layers for integrated circuit core power and serializer-deserializer (SERDES) power into a center area of the integrated circuit footprint. This provides a more reliable and higher current distribution into the center of a large integrated circuit footprint, without causing disruption of high speed signal routing or increased signal integrity burden to the high speed signals. Arrangements and methods for routing out the core power area of a main printed circuit board under an integrated circuit and replacing it with a custom power printed circuit board (power plug) that is attached by a metalized paste sintering process. This provides a more reliable and higher current distribution into the center of a large integrated circuit or other high-power component, without causing disruption of high speed signal routing.
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公开(公告)号：US10999930B2
公开(公告)日：2021-05-04
申请号：US16222913
申请日：2018-12-17
Applicant: CISCO TECHNOLOGY, INC.
Inventor： Shobhana Punjabi , Kan Seto , Straty Argyrakis , Joel Richard Goergen , Paul Lachlan Mantiply , Richard Anthony O'Brien
Abstract: In one embodiment, an apparatus generally comprises a power delivery board for integration with a printed circuit board, the power delivery board comprising a power plane for delivering power from a voltage regulator module to an application specific integrated circuit (ASIC) mounted on a first side of the printed circuit board. The power plane in the power delivery board interconnects with power vias in the power delivery board for vertical alignment with the ASIC through power vias in the printed circuit board to electrically couple the voltage regulator module and the ASIC when the power delivery board is mounted on a second side of the printed circuit board.
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公开(公告)号：US10068721B2
公开(公告)日：2018-09-04
申请号：US15498999
申请日：2017-04-27
Applicant: Cisco Technology, Inc.
Inventor： Michael Robert Grant , Yang Li , Jessica Leigh Kiefer , Kan Chiu Seto , Shobhana Punjabi
IPC: H01H9/54
Abstract: In one embodiment, a hot swap circuit is disclosed. The hot swap circuit includes a first switch connected to a power input line. The hot swap circuit also includes a first capacitor connected to the first switch that is charged when the first switch is closed. The hot swap circuit further includes a second switch connected to the first switch and the first capacitor. The hot swap circuit additionally includes an input capacitor connected to the second switch and located in parallel with an input line to a power system. When the second switch is closed, the input capacitor is charged.
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公开(公告)号：US20170229257A1
公开(公告)日：2017-08-10
申请号：US15498999
申请日：2017-04-27
Applicant: Cisco Technology, Inc.
Inventor： Michael Robert Grant , Yang Li , Jessica Leigh Kiefer , Kan Chiu Seto , Shobhana Punjabi
IPC: H01H9/54
CPC classification number: H01H9/54 , G06F1/26 , G06F1/3287 , H02H9/004 , Y02D10/171
Abstract: In one embodiment, a hot swap circuit is disclosed. The hot swap circuit includes a first switch connected to a power input line. The hot swap circuit also includes a first capacitor connected to the first switch that is charged when the first switch is closed. The hot swap circuit further includes a second switch connected to the first switch and the first capacitor. The hot swap circuit additionally includes an input capacitor connected to the second switch and located in parallel with an input line to a power system. When the second switch is closed, the input capacitor is charged.
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公开(公告)号：US11564317B2
公开(公告)日：2023-01-24
申请号：US17220033
申请日：2021-04-01
Applicant: CISCO TECHNOLOGY, INC.
Inventor： Shobhana Punjabi , Kan Seto , Straty Argyrakis , Joel Richard Goergen , Paul Lachlan Mantiply , Richard Anthony O'Brien
Abstract: In one embodiment, an apparatus generally comprises a printed circuit board comprising a first side, a second side, and a plurality of power vias extending from the first side to the second side, the first side configured for receiving an application specific integrated circuit (ASIC), and a power delivery board mounted on the second side of the printed circuit board and comprising a power plane interconnected with power vias in the power delivery board to electrically couple voltage regulator modules and the ASIC. The voltage regulator modules are mounted on the second side of the printed circuit board.
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Patent Agency Ranking
公开(公告)号：US20210219415A1
公开(公告)日：2021-07-15
申请号：US16743371
申请日：2020-01-15
Applicant: CISCO TECHNOLOGY, INC.
Inventor： Joel Richard Goergen , Jessica Kiefer , Ashley Julia Maker Erickson , Yi Tang , M. Baris Dogruoz , Elizabeth Ann Kochuparambil , Shobhana Punjabi
Abstract: In one embodiment, an apparatus includes a substrate comprising a first surface and a second surface opposite to the first surface, an integrated circuit attached to the first surface of the substrate, and a cold plate attached to the second surface of the substrate with an electrical path extending through the cold plate for transmitting power from a power component connected to the cold plate, to the integrated circuit.
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公开(公告)号：US11252811B2
公开(公告)日：2022-02-15
申请号：US16743371
申请日：2020-01-15
Applicant: CISCO TECHNOLOGY, INC.
Inventor： Joel Richard Goergen , Jessica Kiefer , Ashley Julia Maker Erickson , Yi Tang , M. Baris Dogruoz , Elizabeth Ann Kochuparambil , Shobhana Punjabi
Abstract: In one embodiment, an apparatus includes a substrate comprising a first surface and a second surface opposite to the first surface, an integrated circuit attached to the first surface of the substrate, and a cold plate attached to the second surface of the substrate with an electrical path extending through the cold plate for transmitting power from a power component connected to the cold plate, to the integrated circuit.
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公开(公告)号：US20210219426A1
公开(公告)日：2021-07-15
申请号：US17220033
申请日：2021-04-01
Applicant: CISCO TECHNOLOGY, INC.
Inventor： Shobhana Punjabi , Kan Seto , Straty Argyrakis , Joel Richard Goergen , Paul Lachlan Mantiply , Richard Anthony O'Brien
Abstract: In one embodiment, an apparatus generally comprises a printed circuit board comprising a first side, a second side, and a plurality of power vias extending from the first side to the second side, the first side configured for receiving an application specific integrated circuit (ASIC), and a power delivery board mounted on the second side of the printed circuit board and comprising a power plane interconnected with power vias in the power delivery board to electrically couple voltage regulator modules and the ASIC. The voltage regulator modules are mounted on the second side of the printed circuit board.
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公开(公告)号：US09665164B2
公开(公告)日：2017-05-30
申请号：US14824282
申请日：2015-08-12
Applicant: Cisco Technology, Inc.
Inventor： Michael Robert Grant , Yang Li , Jessica Leigh Kiefer , Kan Chiu Seto , Shobhana Punjabi
IPC: G06F1/32
CPC classification number: H01H9/54 , G06F1/26 , G06F1/3287 , H02H9/004 , Y02D10/171
Abstract: In one embodiment, a hot swap circuit is disclosed. The hot swap circuit includes a first switch connected to a power input line. The hot swap circuit also includes a first capacitor connected to the first switch that is charged when the first switch is closed. The hot swap circuit further includes a second switch connected to the first switch and the first capacitor. The hot swap circuit additionally includes an input capacitor connected to the second switch and located in parallel with an input line to a power system. When the second switch is closed, the input capacitor is charged.
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公开(公告)号：US20170045929A1
公开(公告)日：2017-02-16
申请号：US14824282
申请日：2015-08-12
Applicant: Cisco Technology, Inc.
Inventor： Michael Robert Grant , Yang Li , Jessica Leigh Kiefer , Kan Chiu Seto , Shobhana Punjabi
IPC: G06F1/32
CPC classification number: H01H9/54 , G06F1/26 , G06F1/3287 , H02H9/004 , Y02D10/171
Abstract: In one embodiment, a hot swap circuit is disclosed. The hot swap circuit includes a first switch connected to a power input line. The hot swap circuit also includes a first capacitor connected to the first switch that is charged when the first switch is closed. The hot swap circuit further includes a second switch connected to the first switch and the first capacitor. The hot swap circuit additionally includes an input capacitor connected to the second switch and located in parallel with an input line to a power system. When the second switch is closed, the input capacitor is charged.
Abstract translation: 在一个实施例中，公开了热插拔电路。 热交换电路包括连接到电力输入线的第一开关。 热插拔电路还包括连接到第一开关的第一电容器，其在第一开关闭合时被充电。 热交换电路还包括连接到第一开关和第一电容器的第二开关。 热插拔电路还包括连接到第二开关并与电力系统的输入线并联设置的输入电容器。 当第二个开关闭合时，输入电容器被充电。
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