公开(公告)号：US20220077865A1

公开(公告)日：2022-03-10

申请号：US17419548

申请日：2019-12-23

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Chen LI ,  Hao WANG

IPC: H03M1/00 ,  H03M1/06

Abstract: An analog-to-digital converter and a clock generation circuit thereof are provided. The clock generation circuit comprises cascaded clock generation modules. The clock generation module at each stage is configured to generate a corresponding internal clock signal, and each stage of the clock generation module comprises a delay module and a logic gate module. The second input end of the N-th stage of the logic gate module is connected to the output end of the previous stage of the logic gate module, and the output end of the logic gate module is configured to output an internal clock, so that each stage of the clock generation module can generate one internal clock signal.

公开(公告)号：US20230067583A1

公开(公告)日：2023-03-02

申请号：US17796952

申请日：2021-05-27

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Chen LI ,  Hao WANG

IPC: G01J5/12

Abstract: An analog-to-digital converter and a thermopile array. The analog-to-digital converter comprises: a reference voltage generation circuit comprising a voltage generation unit; a chopping modulation unit used to perform chopping modulation on a voltage signal generated by the voltage generation unit, and to modulate low frequency noise of the voltage signal into high frequency noise; and a low-pass filter used to eliminate the high frequency noise to obtain a reference voltage. The invention employs a simple structure to obtain a low noise reference voltage at low costs.