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1.发明授权Short burst acquisition circuit and method for direct sequence spread spectrum links 失效短脉冲串采集电路和直接序列扩频链路的方法
公开(公告)号：US5883921A
公开(公告)日：1999-03-16
申请号：US509587
申请日：1995-07-31
CPC分类号： H04B1/70751 , H04B1/70775 , H04B1/7087 , H04B1/709 , H04B7/0811 , H04B1/71
摘要： A digital data radio receiver and method evaluates a data signal preamble received on an antenna to determine whether the antenna should receive the data signal following the preamble. The receiver determines frequency offsets from a desired frequency for each symbol in a block of symbols in the preamble, determines the variance of the frequency offsets, determines the average magnitude of the symbols in the block of symbols, where the determination of average magnitude may be performed in parallel with the determination of variance of the frequency offsets, and evaluates the variance and the average magnitude for the block of symbols to determine whether the preamble is actually noise and to assess reception quality at the antenna. In a two antenna diversity receiver system, these steps may be performed first on a block of symbols received at one antenna and then performed on the next block of symbols received at another antenna. This provides two evaluations that may be compared to select the antenna with the best reception.
摘要翻译： 数字数据无线电接收机和方法评估在天线上接收的数据信号前导码，以确定天线是否应该接收在前导码之后的数据信号。 接收机从前导码中的符号块中的每个符号确定来自期望频率的频率偏移，确定频率偏移的方差，确定符号块中的符号的平均幅度，其中平均幅度的确定可以是 与频率偏移的方差的确定并行执行，并且评估符号块的方差和平均幅度以确定前同步码是否实际上是噪声并且评估天线的接收质量。 在两天线分集接收机系统中，这些步骤可以首先在一个天线接收的符号块上执行，然后在另一个天线接收的下一个符号块上执行。 这提供了可以与选择具有最佳接收的天线进行比较的两个评估。
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公开(公告)号：US5732105A
公开(公告)日：1998-03-24
申请号：US509586
申请日：1995-07-31
摘要： A method of estimating signal quality in a radio demodulator receiving an input stream of symbols includes the steps of sampling a phase-only portion of each of the symbols in the input stream, determining a phase error for each of the samples of the phase-only portions, and calculating a signal quality estimate from a plurality of the sample phase errors. The signal quality estimate may be an average magnitude of a predetermined number of sample phase errors. The input stream may be symbols in the preamble, or symbols in the data signal that follows.
摘要翻译： 在接收输入符号流的无线电解调器中估计信号质量的方法包括以下步骤：对输入流中每个符号的相位部分进行采样，确定每相相位样本的相位误差 部分，并且从多个样本相位误差计算信号质量估计。 信号质量估计可以是预定数量的采样相位误差的平均幅度。 输入流可以是前导码中的符号，或者随后的数据信号中的符号。
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3.发明授权A/D reference level adjustment circuit to maintain optimum dynamic range at the A/D 失效A / D参考电平调节电路，以保持A / D的最佳动态范围
公开(公告)号：US5675339A
公开(公告)日：1997-10-07
申请号：US509589
申请日：1995-07-31
CPC分类号： H03M1/1295
摘要： A method and circuit for controlling a reference voltage for an analog-to-digital converter having plural outputs includes a sensor for indicating when outputs from the A/D converter are at least a desired voltage, and a processor responsive to the sensor and connected to a digital-to-analog converter which provides a reference voltage for the A/D converter. The processor provides signals to the D/A converter which change the reference voltage. A logic unit in the processor increments an accumulator when either an I or a Q component in the A/D converter output is at least the desired voltage and decrements the accumulator when neither the I nor the Q component is at least the desired voltage. A counter may buffer the accumulator changes by using only several of the most significant bits of the counter to change the A/D converter reference voltage.
摘要翻译： 用于控制具有多个输出的模数转换器的参考电压的方法和电路包括用于指示何时来自A / D转换器的输出至少为期望电压的传感器，以及响应于传感器并连接到 为A / D转换器提供参考电压的数模转换器。 处理器向D / A转换器提供信号，D / A转换器改变参考电压。 当A / D转换器输出中的I或Q分量至少为所需电压时，处理器中的逻辑单元递增累加器，并且当I和Q分量至少不是所需电压时，累加器递减。 计数器可以通过仅使用计数器的最高有效位来改变A / D转换器参考电压来缓冲累加器的变化。
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公开(公告)号：US5654991A
公开(公告)日：1997-08-05
申请号：US509588
申请日：1995-07-31
CPC分类号： H04B1/70755 , H04L7/0054 , H04B2201/70707
摘要： In a direct sequence spread spectrum receiver, an apparatus for obtaining and adjusting bit synchronization. In one aspect, the bit synchronization is adjusted by selectively inverting a clocking circuit to delay sampling by one-half a clock cycle and to combine the inversion with a skipping of one cycle to advance the sampling by one-half cycle. In another aspect of the invention, the synchronization circuit avoids overflow of accumulating components by downshifting both the partial sums and the input data when needed.
摘要翻译： 在直接序列扩频接收机中，用于获取和调整比特同步的装置。 在一个方面，通过选择性地反相时钟电路来调整比特同步，以将采样延迟半个时钟周期，并将反演与一个周期的跳过组合，以将采样推进半个周期。 在本发明的另一方面，同步电路通过在需要时降低部分和数据和输入数据来避免积累分量的溢出。
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公开(公告)号：US5694417A
公开(公告)日：1997-12-02
申请号：US509590
申请日：1995-07-31
申请人： Carl Andren , John Fakatselis , Perry W. Frogge , Leonard V. Lucas , Al Petrick , Jim Snell
发明人： Carl Andren , John Fakatselis , Perry W. Frogge , Leonard V. Lucas , Al Petrick , Jim Snell
CPC分类号： H04B1/7075 , H04B7/0811 , H04B1/709
摘要： A direct sequence spread spectrum receiver and method for acquiring radio-frequency signals is provided for acquiring data from signals which have been transmitted in a spread spectrum system. The receiver is capable of receiving short data bursts from transmitters without prior knowledge of the time or location of the transmission and rapidly acquiring the signal before continuing with reliable data demodulation. The system includes one or more antennae for receiving RF signals which may be selectively connected to provide the received signals to the system for processing, a quadrature demodulator for providing I and Q baseband signals to a digital baseband processor which includes A/D converters, dual correlators for despreading the digital I and Q signals, a cartesian to polar converter, a demodulator for demodulating the polar coordinate digital I and Q signals, and a data descrambler for obtaining a serial data stream which may be provided to a serial interface.
摘要翻译： 提供一种用于获取射频信号的直接序列扩频接收机和方法，用于从在扩频系统中发送的信号中获取数据。 接收机能够从发射机接收短数据脉冲串，而无需事先知道传输的时间或位置，并在继续进行可靠数据解调之前快速获取信号。 该系统包括用于接收RF信号的一个或多个天线，其可以选择性地连接以将接收到的信号提供给系统进行处理;正交解调器，用于向包括A / D转换器的数字基带处理器提供I和Q基带信号， 用于解扩数字I和Q信号的相关器，笛卡尔到极化转换器，用于解调极坐标数字I和Q信号的解调器，以及用于获得可提供给串行接口的串行数据流的数据解扰器。
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