摘要:
A copy engine (104) is provided as an interface between firmware (108) and memory space (106) for carrying out copy operations. The copy engine has a first register (202, 203) to point to a first address and a second register (204, 205) to point to a second address. One of the first and second addresses is a source address and one is a destination address for data to be copied. The copy engine (104) also has a control register (201). The control register (201) includes a count of the amount of memory space required by a copy operation, an indication of the direction of the copy operation from the first address to the second address or from the second address to the first address, and an indication of whether the first memory address is incremented or decremented. The copy engine (104) includes a locking mechanism for locking the copy engine (104) during a copy operation. The copy engine (104) also includes a serialisation mechanism in which a write is made to the control register (201) of zero count. If the copy engine (104) is locked, the write of zero count is retried until the existing copy operation has completed and then it will complete with no effect.
摘要:
A copy engine (104) is provided as an interface between firmware (108) and memory space (106) for carrying out copy operations. The copy engine has a first register (202, 203) to point to a first address and a second register (204, 205) to point to a second address. One of the first and second addresses is a source address and one is a destination address for data to be copied. The copy engine (104) also has a control register (201). The control register (201) includes a count of the amount of memory space required by a copy operation, an indication of the direction of the copy operation from the first address to the second address or from the second address to the first address, and an indication of whether the first memory address is incremented or decremented. The copy engine (104) includes a locking mechanism for locking the copy engine (104) during a copy operation. The copy engine (104) also includes a serialisation mechanism in which a write is made to the control register (201) of zero count. If the copy engine (104) is locked, the write of zero count is retried until the existing copy operation has completed and then it will complete with no effect.
摘要:
A copy engine (104) is provided as an interface between firmware (108) and memory space (106) for carrying out copy operations. The copy engine has a first register (202, 203) to point to a first address and a second register (204, 205) to point to a second address. One of the first and second addresses is a source address and one is a destination address for data to be copied. The copy engine (104) also has a control register (201). The control register (201) includes a count of the amount of memory space required by a copy operation, an indication of the direction of the copy operation from the first address to the second address or from the second address to the first address, and an indication of whether the first memory address is incremented or decremented. The copy engine (104) includes a locking mechanism for locking the copy engine (104) during a copy operation. The copy engine (104) also includes a serialization mechanism in which a write is made to control register (201) of zero count. If the copy engine (104) is locked, the write of zero count is retried until the existing copy operation has completed and then it will complete with no effect.
摘要:
A copy engine (104) is provided as an interface between firmware (108) and memory space (106) for carrying out copy operations. The copy engine has a first register (202, 203) to point to a first address and a second register (204, 205) to point to a second address. One of the first and second addresses is a source address and one is a destination address for data to be copied. The copy engine (104) also has a control register (201). The control register (201) includes a count of the amount of memory space required by a copy operation, an indication of the direction of the copy operation from the first address to the second address or from the second address to the first address, and an indication of whether the first memory address is incremented or decremented. The copy engine (104) includes a locking mechanism for locking the copy engine (104) during a copy operation. The copy engine (104) also includes a serialisation mechanism in which a write is made to the control register (201) of zero count. If the copy engine (104) is locked, the write of zero count is retried until the existing copy operation has completed and then it will complete with no effect.
摘要:
A copy engine (104) is provided as an interface between firmware (108) and memory space (106) for carrying out copy operations. The copy engine has a first register (202, 203) to point to a first address and a second register (204, 205) to point to a second address. One of the first and second addresses is a source address and one is a destination address for data to be copied. The copy engine (104) also has a control register (201). The control register (201) includes a count of the amount of memory space required by a copy operation, an indication of the direction of the copy operation from the first address to the second address or from the second address to the first address, and an indication of whether the first memory address is incremented or decremented. The copy engine (104) includes a locking mechanism for locking the copy engine (104) during a copy operation. The copy engine (104) also includes a serialization mechanism in which a write is made to control register (201) of zero count. If the copy engine (104) is locked, the write of zero count is retried until the existing copy operation has completed and then it will complete with no effect.
摘要:
This invention relates to an asynchronous remote copying (ARC) system adapted to operate as a remote copy pair by communicating between primary storage and remote storage of a remote copy pair. The system comprises a primary controller for receiving a write command and writing data to primary storage; a remote controller for receiving a write command and writing data to remote storage; an ARC controller for suppressing the release of the write command to the remote controller if a delay between receiving the write command and the time when the remote storage may accept the data is more than a threshold delay, and the primary controller suppresses recording the data in primary storage until release of the write command to the remote storage.
摘要:
This invention relates to an asynchronous remote copying (ARC) system adapted to operate as a remote copy pair by communicating between primary storage and remote storage of a remote copy pair. The system comprises a primary controller for receiving a write command and writing data to primary storage; a remote controller for receiving a write command and writing data to remote storage; an ARC controller for suppressing the release of the write command to the remote controller if a delay between receiving the write command and the time when the remote storage may accept the data is more than a threshold delay, and the primary controller suppresses recording the data in primary storage until release of the write command to the remote storage.
摘要:
A data processing system comprises a master processor (10), a slave processor (30), a memory (50), and a bus subsystem (20) interconnecting the master processor (10), the slave processor (30), and the memory (50). The master processor (10) is configured to generate, in response to a memory access instruction, a read request comprising a read command for execution by the slave processor (30) to read data stored in a location in the memory (50) specified by the memory access instruction, and to write the read request to the slave processor (30) via the bus subsystem (20). The slave processor (30) is configured to execute the read command received in the read request from the master processor (10) to obtain the data stored at the specified location in the memory (50) and to write the data thus obtained to the master processor (10) via the bus subsystem (20).
摘要:
A method and apparatus for recovery from faults in a loop network (500) is provided. The loop network (500) has a plurality of ports (520, 530, 532, 534) serially connected with means for bypassing the ports (520, 530, 532, 534) from the loop network (500). A control device (522, 524) is provided with bypass control over at least one of the ports (530, 532, 534). A host means (502) sends a command to the control device (522, 524) at regular intervals and the control device (522, 524) has a counter which restarts a time period at the receipt of each command. If the time period expires, the control device (522, 524) activates the means for bypassing all the ports (530, 532, 534) under its control. The loop network (500) may have two loops (516, 518) with at least some of the ports (520, 530, 532, 534) common to both loops (516, 518).
摘要:
A method and apparatus for recovery from faults in a loop network (400) is provided. The loop network (400) has a host means (402), a first loop and a second loop (406, 408), a plurality of ports (410) connected to each of the loops (406, 408) and a control device (414, 440) on or connected to each loop (406, 408) with bypass control over at least one of the ports (410) connected to the loop (406, 408). In the event of a failure on the first loop (406), the host means (402) instructs the bypassing of at least one port (410) on the first loop (406), the host means (402) sending the instructions via the control device (414, 440) on or connected to the second loop (408). The host means (402) may determine the physical topology of the ports (410) on the first and second loops (406, 408) such that when a failure is reported to the host means (402) by a port (432) on the first loop (406), the host means (402) instructs the bypassing of a port (434) in a specific relationship to the reporting port (432) on the first loop (434). The host means (402) may instruct the bypassing of all ports (416) on the first loop (406) and subsequently selectively un-bypass ports (416) to ascertain the location of a faulty port or ports.