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公开(公告)号：US20080119048A1
公开(公告)日：2008-05-22
申请号：US11602886
申请日：2006-11-21
IPC分类号： H01L21/302
CPC分类号： G03F1/50 , G02B5/3083 , Y10T428/24479
摘要： Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment comprises a method of manufacturing a lithography mask. The method includes providing a substrate, forming a first pattern in a first region of the substrate, and forming a second pattern in a second region of the substrate, the second pattern comprising patterns for features oriented differently than patterns for features of the first pattern. The method includes affecting a polarization rotation of light differently in the first region than in the second region of the substrate.
摘要翻译： 公开了平版印刷掩模及其制造方法。 优选实施例包括制造光刻掩模的方法。 所述方法包括提供衬底，在所述衬底的第一区域中形成第一图案，以及在所述衬底的第二区域中形成第二图案，所述第二图案包括不同于第一图案特征的图案的图案。 该方法包括在第一区域中比在衬底的第二区域中影响光的偏振旋转。
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公开(公告)号：US07799486B2
公开(公告)日：2010-09-21
申请号：US11602886
申请日：2006-11-21
IPC分类号： G03F1/00
CPC分类号： G03F1/50 , G02B5/3083 , Y10T428/24479
摘要： Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment comprises a method of manufacturing a lithography mask. The method includes providing a substrate, forming a first pattern in a first region of the substrate, and forming a second pattern in a second region of the substrate, the second pattern comprising patterns for features oriented differently than patterns for features of the first pattern. The method includes affecting a polarization rotation of light differently in the first region than in the second region of the substrate.
摘要翻译： 公开了平版印刷掩模及其制造方法。 优选实施例包括制造光刻掩模的方法。 所述方法包括提供衬底，在所述衬底的第一区域中形成第一图案，以及在所述衬底的第二区域中形成第二图案，所述第二图案包括不同于第一图案特征的图案的图案。 该方法包括在第一区域中比在衬底的第二区域中影响光的偏振旋转。
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公开(公告)号：US20100297398A1
公开(公告)日：2010-11-25
申请号：US12847641
申请日：2010-07-30
CPC分类号： G03F1/50 , G02B5/3083 , Y10T428/24479
摘要： Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment comprises a method of manufacturing a lithography mask. The method includes providing a substrate, forming a first pattern in a first region of the substrate, and forming a second pattern in a second region of the substrate, the second pattern comprising patterns for features oriented differently than patterns for features of the first pattern. The method includes affecting a polarization rotation of light differently in the first region than in the second region of the substrate.
摘要翻译： 公开了平版印刷掩模及其制造方法。 优选实施例包括制造光刻掩模的方法。 所述方法包括提供衬底，在所述衬底的第一区域中形成第一图案，以及在所述衬底的第二区域中形成第二图案，所述第二图案包括不同于第一图案特征的图案的图案。 该方法包括在第一区域中比在衬底的第二区域中影响光的偏振旋转。
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公开(公告)号：US07947431B2
公开(公告)日：2011-05-24
申请号：US12847641
申请日：2010-07-30
CPC分类号： G03F1/50 , G02B5/3083 , Y10T428/24479
摘要： Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment comprises a method of manufacturing a lithography mask. The method includes providing a substrate, forming a first pattern in a first region of the substrate, and forming a second pattern in a second region of the substrate, the second pattern comprising patterns for features oriented differently than patterns for features of the first pattern. The method includes affecting a polarization rotation of light differently in the first region than in the second region of the substrate.
摘要翻译： 公开了平版印刷掩模及其制造方法。 优选实施例包括制造光刻掩模的方法。 所述方法包括提供衬底，在所述衬底的第一区域中形成第一图案，以及在所述衬底的第二区域中形成第二图案，所述第二图案包括不同于第一图案特征的图案的图案。 该方法包括在第一区域中比在衬底的第二区域中影响光的偏振旋转。
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公开(公告)号：US07713824B2
公开(公告)日：2010-05-11
申请号：US11677206
申请日：2007-02-21
IPC分类号： H01L21/8236 , H01L21/00
CPC分类号： H01L21/32139 , G03F1/70 , G03F7/70466
摘要： A method for controlling etching during photolithography in the fabrication of an integrated circuit in connection with first and second features that are formed on the integrated circuit having a gap there between comprising depositing a layer of photoresist on the integrated circuit, selectively exposing portions of the photoresist through at least one photolithography mask having a pattern including means for alleviating line end shortening of the first and second lines adjacent the gap, and developing the photoresist after the selective exposing step.
摘要翻译： 一种用于在制造集成电路的第一和第二特征的集成电路的制造中控制蚀刻的方法，所述第一和第二特征形成在其上具有间隙的集成电路上，包括在集成电路上沉积光致抗蚀剂层，选择性地暴露部分光致抗蚀剂 通过至少一个具有图案的光刻掩模，该图案包括用于减轻邻近间隙的第一和第二线的线端缩短的装置，以及在选择性曝光步骤之后显影光致抗蚀剂。
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公开(公告)号：US20080199784A1
公开(公告)日：2008-08-21
申请号：US11677206
申请日：2007-02-21
CPC分类号： H01L21/32139 , G03F1/70 , G03F7/70466
摘要： A method for controlling etching during photolithography in the fabrication of an integrated circuit in connection with first and second features that are formed on the integrated circuit having a gap there between comprising depositing a layer of photoresist on the integrated circuit, selectively exposing portions of the photoresist through at least one photolithography mask having a pattern including means for alleviating line end shortening of the first and second lines adjacent the gap, and developing the photoresist after the selective exposing step.
摘要翻译： 一种用于在制造集成电路的第一和第二特征的集成电路的制造中控制蚀刻的方法，所述第一和第二特征形成在其上具有间隙的集成电路上，包括在集成电路上沉积光致抗蚀剂层，选择性地暴露部分光致抗蚀剂 通过至少一个具有图案的光刻掩模，该图案包括用于减轻邻近间隙的第一和第二线的线端缩短的装置，以及在选择性曝光步骤之后显影光致抗蚀剂。
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公开(公告)号：US08603912B2
公开(公告)日：2013-12-10
申请号：US13225675
申请日：2011-09-06
申请人： Josef Maynollo , Thomas Detzel
发明人： Josef Maynollo , Thomas Detzel
IPC分类号： H01L21/4763
CPC分类号： H01L23/485 , H01L23/3157 , H01L2924/0002 , H01L2924/01046 , H01L2924/01079 , H01L2924/00
摘要： A power semiconductor component and a method for the production of a power semiconductor component are disclosed. According to one embodiment of the invention, a topmost metallization region that is provided is formed in a manner extended laterally and outside contacts formed, in such a way that, as a result, a protection and sealing material region to be provided is formed, while avoiding electrically insulating additional protection and sealing layers that are usually to be provided.
摘要翻译： 公开了功率半导体元件和功率半导体元件的制造方法。 根据本发明的一个实施例，提供的最上面的金属化区域以横向延伸的方式形成，并且以形成的外部触点形成，从而形成要提供的保护和密封材料区域，同时 避免电绝缘附加的保护和通常要提供的密封层。
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公开(公告)号：US08039931B2
公开(公告)日：2011-10-18
申请号：US11287736
申请日：2005-11-28
申请人： Josef Maynollo , Thomas Detzel
发明人： Josef Maynollo , Thomas Detzel
IPC分类号： H01L21/00 , H01L29/66 , H01L23/495
CPC分类号： H01L23/485 , H01L23/3157 , H01L2924/0002 , H01L2924/01046 , H01L2924/01079 , H01L2924/00
摘要： A power semiconductor component and a method for the production of a power semiconductor component are disclosed. According to one embodiment of the invention, a topmost metallization region that is provided is formed in a manner extended laterally and outside contacts formed, in such a way that, as a result, a protection and sealing material region to be provided is formed, whilst avoiding electrically insulating additional protection and sealing layers that are usually to be provided.
摘要翻译： 公开了功率半导体元件和功率半导体元件的制造方法。 根据本发明的一个实施例，提供的最上面的金属化区域以横向延伸的方式形成，并且以形成的外部触点形成，从而形成要提供的保护和密封材料区域，同时 避免电绝缘附加的保护和通常要提供的密封层。
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公开(公告)号：US20060145342A1
公开(公告)日：2006-07-06
申请号：US11287736
申请日：2005-11-28
申请人： Josef Maynollo , Thomas Detzel
发明人： Josef Maynollo , Thomas Detzel
CPC分类号： H01L23/485 , H01L23/3157 , H01L2924/0002 , H01L2924/01046 , H01L2924/01079 , H01L2924/00
摘要： A power semiconductor component and a method for the production of a power semiconductor component are disclosed. According to one embodiment of the invention, a topmost metallization region that is provided is formed in a manner extended laterally and outside contacts formed, in such a way that, as a result, a protection and sealing material region to be provided is formed, whilst avoiding electrically insulating additional protection and sealing layers that are usually to be provided.
摘要翻译： 公开了功率半导体元件和功率半导体元件的制造方法。 根据本发明的一个实施例，提供的最上面的金属化区域以横向延伸的方式形成，并且以形成的外部触点形成，从而形成要提供的保护和密封材料区域，同时 避免电绝缘附加的保护和通常要提供的密封层。
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公开(公告)号：US20080020542A1
公开(公告)日：2008-01-24
申请号：US11491631
申请日：2006-07-24
申请人： Josef Maynollo
发明人： Josef Maynollo
IPC分类号： H01L21/76
CPC分类号： H01L29/0649 , H01L21/76224 , H01L21/823878
摘要： Methods of fabricating semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a method of fabricating a semiconductor device includes providing a workpiece having a plurality of trenches formed therein, forming a liner over the workpiece, and forming a layer of photosensitive material over the liner. The layer of photosensitive material is removed from over the workpiece except from over at least a portion of each of the plurality of trenches. The layer of photosensitive material is partially removed from over the workpiece, leaving a portion of the layer of photosensitive material remaining within a lower portion of the plurality of trenches over the liner.
摘要翻译： 公开了制造半导体器件的方法及其结构。 在优选实施例中，制造半导体器件的方法包括提供具有形成在其中的多个沟槽的工件，在工件上形成衬垫，以及在衬套上形成感光材料层。 除了多个沟槽中的每一个的至少一部分之外，感光材料层从工件上除去。 感光材料层从工件上部分地被去除，使得感光材料层的一部分留在多个沟槽的下部中超过衬垫。
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