公开(公告)号：US20050142988A1

公开(公告)日：2005-06-30

申请号：US10879030

申请日：2004-06-30

申请人： Chang Kim ,  Chi Kim ,  Tae Lee ,  Hi Kang

发明人： Chang Kim ,  Chi Kim ,  Tae Lee ,  Hi Kang

IPC分类号： H01L21/304 ,  B24B37/04 ,  B24B49/00 ,  B24B1/00

CPC分类号： B24B37/042

摘要： A CMP process using a slurry containing an abrasive of low concentration is disclosed. More specifically, a planarization process is performed using the slurry containing an abrasive of low concentration of less than 0.1 wt % unlike the conventional CMP slurry, thereby improving uniformity of a CMP process in a manufacture process of a semiconductor device to secure yield and reliability of the device. Particularly, since the disclosed slurry has the more excellent effect of achieving the planarization degree than that of the conventional slurry, the thickness of deposited films before the CMP process can be reduced, and the CMP amount can also be minimized.

摘要翻译： 公开了使用含有低浓度磨料的浆料的CMP方法。 更具体地，使用含有少于0.1重量％的低浓度的研磨剂的浆料进行平坦化处理，这与传统的CMP浆料不同，从而提高半导体器件的制造过程中的CMP工艺的均匀性，以确保半导体器件的成品率和可靠性 装置。 特别地，由于所公开的浆料具有比常规浆料获得更好的平坦化度的优异效果，所以可以减少在CMP工艺之前的沉积膜的厚度，并且还可以使CMP量最小化。

公开(公告)号：US20050196965A1

公开(公告)日：2005-09-08

申请号：US11006187

申请日：2004-12-07

申请人： Chang Kim ,  Chi Kim ,  Hi Kang ,  Tae Lee ,  Kwang Park

发明人： Chang Kim ,  Chi Kim ,  Hi Kang ,  Tae Lee ,  Kwang Park

IPC分类号： H01L21/306 ,  H01L21/302 ,  H01L21/336 ,  H01L21/461 ,  H01L21/4763

CPC分类号： H01L21/3212 ,  H01L21/31053 ,  H01L21/7684 ,  H01L21/76895

摘要： The disclosure relates to a method for manufacturing a semiconductor device by performing a planarization process including a first CMP process using a slurry including 0.05˜0.5 wt % CeO2 o r MnO2 as an abrasive and a second CMP process using a slurry including SiO2 as the other abrasive regardless of order of the processes. The CMP process is performed using the first slurry having a high polishing speed in the middle of the wafer and the second slurry having a high polishing speed at the edge of the wafer, thereby decreasing the processing cost and securing the process margin to secure yield and reliability of devices

摘要翻译： 本公开涉及一种通过执行包括使用包含0.05〜0.5重量％的CeO 2或MnO 2作为研磨剂的浆料的第一CMP工艺的平坦化工艺和使用包含SiO 2作为其它研磨剂的浆料的第二CMP工艺来制造半导体器件的方法 不管进程的顺序。 使用在晶片中间具有高抛光速度的第一浆料和在晶片边缘具有高抛光速度的第二浆料进行CMP处理，从而降低加工成本并确保加工余量以确保产量和 设备的可靠性