Faucet assembly
    1.
    外观设计

    公开(公告)号:USD991406S1

    公开(公告)日:2023-07-04

    申请号:US29859257

    申请日:2022-11-09

    Applicant: Chao Xu

    Designer: Chao Xu

    Abstract: FIG. 1 is a perspective view of a first component of a faucet assembly, shown separately for ease of illustration;
    FIG. 2 is another perspective view thereof;
    FIG. 3 is a front elevational view thereof;
    FIG. 4 is a rear elevational view thereof;
    FIG. 5 is a left side elevational view thereof;
    FIG. 6 is a right side elevational view thereof;
    FIG. 7 is a top plan view thereof;
    FIG. 8 is a bottom plan view thereof;
    FIG. 9 is a perspective view of a second component of a faucet assembly, shown separately for ease of illustration;
    FIG. 10 is another perspective view thereof;
    FIG. 11 is a front elevational view thereof;
    FIG. 12 is a rear elevational view thereof;
    FIG. 13 is a left side elevational view thereof;
    FIG. 14 is a right side elevational view thereof;
    FIG. 15 is a top plan view thereof;
    FIG. 16 is a bottom plan view thereof; and,
    FIG. 17 is a perspective view of the first component and the second component of the faucet assembly shown in a position of use.
    The broken lines in the drawings depict portions of the faucet assembly that form no part of the claimed design. The broken lines shown in FIG. 17 show portions of the faucet assembly and environmental subject matter that form no part of the claimed design.

    Faucet assembly
    2.
    外观设计

    公开(公告)号:USD991405S1

    公开(公告)日:2023-07-04

    申请号:US29859256

    申请日:2022-11-09

    Applicant: Chao Xu

    Designer: Chao Xu

    Abstract: FIG. 1 is a perspective view of a first component of a faucet assembly, shown separately for ease of illustration;
    FIG. 2 is another perspective view thereof;
    FIG. 3 is a front elevational view thereof;
    FIG. 4 is a rear elevational view thereof;
    FIG. 5 is a left side elevational view thereof;
    FIG. 6 is a right side elevational view thereof;
    FIG. 7 is a top plan view thereof;
    FIG. 8 is a bottom plan view thereof;
    FIG. 9 is a perspective view of a second component of a faucet assembly, shown separately for ease of illustration;
    FIG. 10 is another perspective view thereof;
    FIG. 11 is a front elevational view thereof;
    FIG. 12 is a rear elevational view thereof;
    FIG. 13 is a left side elevational view thereof;
    FIG. 14 is a right side elevational view thereof;
    FIG. 15 is a top plan view thereof;
    FIG. 16 is a bottom plan view thereof; and,
    FIG. 17 is a perspective view of the first component and the second component of the faucet assembly shown in a position of use.
    The broken lines in the drawings depict portions of the faucet assembly that form no part of the claimed design. The broken lines shown in FIG. 17 show portions of the faucet assembly and environmental subject matter that form no part of the claimed design.

    Faucet
    3.
    外观设计
    Faucet 有权

    公开(公告)号:USD985731S1

    公开(公告)日:2023-05-09

    申请号:US29859409

    申请日:2022-11-10

    Applicant: Chao Xu

    Designer: Chao Xu

    Abstract: FIG. 1 is a perspective view of a faucet showing my new design;
    FIG. 2 is another perspective view thereof;
    FIG. 3 is a front elevational view thereof;
    FIG. 4 is a rear elevational view thereof;
    FIG. 5 is a left side elevational view thereof;
    FIG. 6 is a right side elevational view thereof;
    FIG. 7 is a top plan view thereof; and,
    FIG. 8 is a bottom plan view thereof.
    The broken lines in the drawings depict portions of the faucet that form no part of the claimed design.

    Method and apparatus for file processing

    公开(公告)号:US10210148B2

    公开(公告)日:2019-02-19

    申请号:US13813720

    申请日:2011-08-01

    Abstract: The embodiments of the present invention provide a method and an apparatus for file processing. The method for file processing includes: obtaining a file; parsing the file to obtain a first character contained in the file; matching the first character with a preconfigured matching character library; obtaining an annotation corresponding to the first character when the first character satisfies a predetermined condition; and displaying the first character and the annotation. With the embodiments of the present invention, automatic annotation can be provided for a particular character in a file, such that the user's reading experience can be improved.

    Methods, devices, and systems for allocating IP address
    5.
    发明授权
    Methods, devices, and systems for allocating IP address 有权
    用于分配IP地址的方法,设备和系统

    公开(公告)号:US09100303B2

    公开(公告)日:2015-08-04

    申请号:US13993225

    申请日:2011-11-30

    CPC classification number: H04L43/0823 H04L61/2015 H04L61/2046

    Abstract: The embodiments of the present disclosure provide a method, a device and a network system for allocating an IP address. The allocating method comprises: allocating a first IP address to a first server; allocating a second IP address to a client connected to the first server; monitoring the client allocated with the second IP address; allocating a third IP address to the first server when a monitoring result indicates that an IP address conflict exists between the first IP address and a current IP address of a second server; wherein the second server is connected to the client allocated with the second IP address. The method may reallocate the IP address automatically when a subnet conflict occurs.

    Abstract translation: 本公开的实施例提供了一种用于分配IP地址的方法,设备和网络系统。 所述分配方法包括:向第一服务器分配第一IP地址; 向连接到第一服务器的客户端分配第二IP地址; 监控分配有第二个IP地址的客户端; 当监视结果指示第一IP地址与第二服务器的当前IP地址之间存在IP地址冲突时,向第一服务器分配第三IP地址; 其中所述第二服务器连接到分配有所述第二IP地址的客户端。 当发生子网冲突时,该方法可以自动重新分配IP地址。

    APPARATUS HAVING MOBILE TERMINAL AS INPUT/OUTPUT DEVICE OF COMPUTER AND RELATED SYSTEM AND METHOD
    6.
    发明申请
    APPARATUS HAVING MOBILE TERMINAL AS INPUT/OUTPUT DEVICE OF COMPUTER AND RELATED SYSTEM AND METHOD 审中-公开
    具有移动终端的装置作为计算机的输入/输出装置及相关系统和方法

    公开(公告)号:US20090088208A1

    公开(公告)日:2009-04-02

    申请号:US12239557

    申请日:2008-09-26

    CPC classification number: H04M1/7253 H04M1/2535

    Abstract: A system having a mobile terminal used as an input/output device of a computer is disclosed. The system may comprise a mobile terminal side audio input/output unit, a mobile terminal side sending/receiving unit, a computer side sending/receiving unit and a computer side virtual audio driving unit, wherein, the mobile terminal side audio input unit is adapted to collect audio data; the mobile terminal side audio output unit is adapted to play the audio data; the computer side virtual audio driving unit is adapted to have the mobile terminal used as the input/output device of the computer. A mobile terminal, a computer, and a method for the system are also disclosed. It is possible to, with an existing mobile terminal, directly have the mobile terminal virtualized as the input/output device of the computer by using the system of the present invention and the mobile terminal, the computer and the method thereof, so that users may use the mobile terminal to initiate and receive VoIP calls.

    Abstract translation: 公开了一种具有用作计算机的输入/输出装置的移动终端的系统。 该系统可以包括移动终端侧音频输入/输出单元,移动终端侧发送/接收单元,计算机侧发送/接收单元和计算机侧虚拟音频驱动单元,其中,适配移动终端侧音频输入单元 收集音频数据; 移动终端侧音频输出单元适于播放音频数据; 计算机侧虚拟音频驱动单元适于将移动终端用作计算机的输入/输出设备。 还公开了一种移动终端,计算机和该系统的方法。 通过使用本发明的系统和移动终端,计算机及其方法,可以利用现有的移动终端直接将移动终端虚拟化为计算机的输入/输出设备,使得用户可以 使用移动终端发起和接收VoIP呼叫。

    Locked-loop integrated circuits having speed tracking circuits therein
    7.
    发明授权
    Locked-loop integrated circuits having speed tracking circuits therein 有权
    其中具有速度跟踪电路的锁相集成电路

    公开(公告)号:US07239188B1

    公开(公告)日:2007-07-03

    申请号:US11264111

    申请日:2005-11-01

    CPC classification number: H03L7/0812 H03L7/0893 H03L7/093 H03L7/0995

    Abstract: Clock generators include phase-locked and delay-locked loop integrated circuits that support efficient high speed testing of clock frequencies. An integrated circuit device is provided with a clock signal generator having at least one delay element therein that is responsive to a control signal. A speed tracking circuit is also provided. This speed tracking circuit is configured to generate a signal having a measurable characteristic that tracks changes in a property of the control signal that influences a delay of the at least one delay element.

    Abstract translation: 时钟发生器包括锁相和延迟锁定环集成电路,支持对时钟频率的高效测试。 集成电路器件设置有时钟信号发生器,其具有响应于控制信号的至少一个延迟元件。 还提供了速度跟踪电路。 该速度跟踪电路被配置为产生具有可测量特性的信号,其跟踪影响至少一个延迟元件的延迟的控制信号的属性的变化。

    Extended frequency range voltage-controlled oscillator
    9.
    发明授权
    Extended frequency range voltage-controlled oscillator 有权
    扩展频率范围压控振荡器

    公开(公告)号:US06621360B1

    公开(公告)日:2003-09-16

    申请号:US10056412

    申请日:2002-01-22

    CPC classification number: H03L7/0995 H03K3/0322 H03K2005/00026 H03L2207/06

    Abstract: VCO frequency is continuously variable through a wide frequency range in proportion to a first control voltage VC produced by a PLL containing the VCO. A second control voltage NVC is produced as a monotonically decreasing function of VC. A first current I0 is produced in proportion to VC and a second current I1 is produced in proportion to NVC. I1 is subtracted from I0, producing a control current IC=I0-I1 which is applied to the VCO.

    Abstract translation: VCO频率与由包含VCO的PLL产生的第一控制电压VC成比例的宽频率范围可连续变化。 产生第二控制电压NVC作为VC的单调递减函数。 与VC成比例地产生第一电流I0,并且与NVC成比例地产生第二电流I1。 从I0减去I1,产生施加到VCO的控制电流IC = I0-I1。

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