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1.发明申请BIDIRECTIONAL CONTROLLING DEVICE FOR INCREASING RESISTANCE OF ELEMENTS ON VOLTAGE STRESS 有权双向控制装置，用于提高电压应力的元件电阻公开(公告)号：US20090206909A1
公开(公告)日：2009-08-20
申请号：US12135220
申请日：2008-06-09
申请人： Chen-Ming Chen , Kuang-Hsiang Liu , Sheng-Chao Liu
发明人： Chen-Ming Chen , Kuang-Hsiang Liu , Sheng-Chao Liu
IPC分类号： H03K17/687 , G09G3/36
CPC分类号： H03K17/687 , H03K17/002
摘要： A bidirectional controlling device is utilized for receiving two input signals, which are respectively provided from a first input terminal and a second input terminal, and for respectively providing two output signals to a first output terminal and a second output terminal, by controlling a plurality of switch sets.
摘要翻译： 双向控制装置用于接收从第一输入端和第二输入端分别提供的两个输入信号，并且通过控制多个输入信号分别提供两个输出信号给第一输出端和第二输出端 开关组。
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2.发明授权Bidirectional controlling device for increasing resistance of elements on voltage stress 有权双向控制设备，用于对电压应力增大元件的电阻公开(公告)号：US07852976B2
公开(公告)日：2010-12-14
申请号：US12135220
申请日：2008-06-09
申请人： Chen-Ming Chen , Kuang-Hsiang Liu , Sheng-Chao Liu
发明人： Chen-Ming Chen , Kuang-Hsiang Liu , Sheng-Chao Liu
IPC分类号： G11C19/00
CPC分类号： H03K17/687 , H03K17/002
摘要： A bidirectional controlling device is utilized for receiving two input signals, which are respectively provided from a first input terminal and a second input terminal, and for respectively providing two output signals to a first output terminal and a second output terminal, by controlling a plurality of switch sets.
摘要翻译： 双向控制装置用于接收两个输入信号，其分别从第一输入端子和第二输入端子提供，并用于分别提供两个输出信号给第一输出端和第二输出端，通过控制多个 切换台。
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公开(公告)号：US08259895B2
公开(公告)日：2012-09-04
申请号：US13330489
申请日：2011-12-19
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A bidirectional shift register includes first, second, third and fourth control signal bus lines for providing first, second, third and fourth control signals, Bi1, Bi2, Bi3 and Bi4, respectively, and a plurality of shift register stages electrically coupled in serial, each shift register stage having first and second input nodes, where the shift register stages are grouped into a first section and a second section, where the first and second input nodes of each shift register stage in the first section are electrically coupled to the first and second control signal bus lines for receiving the first and second control signals Bi1 and Bi2, respectively, and the first and second input nodes of each shift register stage in the second section are electrically coupled to the third and fourth control signal bus lines for receiving the third and fourth control signals Bi3 and Bi4, respectively.
摘要翻译： 双向移位寄存器包括用于分别提供第一，第二，第三和第四控制信号Bi1，Bi2，Bi3和Bi4的第一，第二，第三和第四控制信号总线，以及分别电连接的多个移位寄存器级， 每个移位寄存器级具有第一和第二输入节点，其中移位寄存器级被分组为第一部分和第二部分，其中第一部分中每个移位寄存器级的第一和第二输入节点电耦合到第一部分和第二部分， 分别用于接收第一和第二控制信号Bi1和Bi2的第二控制信号总线和第二部分中每个移位寄存器级的第一和第二输入节点电耦合到第三和第四控制信号总线， 第三和第四控制信号Bi3和Bi4。
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公开(公告)号：US08294651B2
公开(公告)日：2012-10-23
申请号：US12508573
申请日：2009-07-24
IPC分类号： G09G3/36
CPC分类号： G02F1/136286 , G09G3/3655 , G09G2300/0456 , G09G2320/0673
摘要： A liquid crystal display (LCD) is provided. The LCD includes a display panel and a voltage supply device (VSD). The display panel includes a plurality of scan lines, a plurality of data lines disposed substantially perpendicularly with the scan lines, and a plurality of pixels. The pixels are respectively electrically connected with the corresponding data line and the corresponding scan line, and are arranged in an array. Each of the pixels includes a common line and a compensation line, wherein the common line is located in the transparent area to receive a common voltage, and the compensation line is located in the reflection area to receive a stable voltage. The VSD is coupled to the compensation line of each of the pixels for continuously and correspondingly providing the stable voltage to the compensation line of each of the pixels.
摘要翻译： 提供液晶显示器（LCD）。 LCD包括显示面板和电压供应装置（VSD）。 显示面板包括多条扫描线，与扫描线大致垂直设置的多条数据线以及多个像素。 像素分别与相应的数据线和对应的扫描线电连接，并且被排列成阵列。 每个像素包括公共线和补偿线，其中公共线位于透明区域中以接收公共电压，并且补偿线位于反射区域中以接收稳定的电压。 VSD耦合到每个像素的补偿线，用于连续地并相应地将稳定的电压提供给每个像素的补偿线。
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公开(公告)号：US20120087461A1
公开(公告)日：2012-04-12
申请号：US13330489
申请日：2011-12-19
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A bidirectional shift register includes first, second, third and fourth control signal bus lines for providing first, second, third and fourth control signals, Bi1, Bi2, Bi3 and Bi4, respectively, and a plurality of shift register stages electrically coupled in serial, each shift register stage having first and second input nodes, where the shift register stages are grouped into a first section and a second section, where the first and second input nodes of each shift register stage in the first section are electrically coupled to the first and second control signal bus lines for receiving the first and second control signals Bi1 and Bi2, respectively, and the first and second input nodes of each shift register stage in the second section are electrically coupled to the third and fourth control signal bus lines for receiving the third and fourth control signals Bi3 and Bi4, respectively.
摘要翻译： 双向移位寄存器包括用于分别提供第一，第二，第三和第四控制信号Bi1，Bi2，Bi3和Bi4的第一，第二，第三和第四控制信号总线，以及分别电连接的多个移位寄存器级， 每个移位寄存器级具有第一和第二输入节点，其中移位寄存器级被分组为第一部分和第二部分，其中第一部分中每个移位寄存器级的第一和第二输入节点电耦合到第一部分和第二部分， 分别用于接收第一和第二控制信号Bi1和Bi2的第二控制信号总线和第二部分中每个移位寄存器级的第一和第二输入节点电耦合到第三和第四控制信号总线， 第三和第四控制信号Bi3和Bi4。
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公开(公告)号：US20110170656A1
公开(公告)日：2011-07-14
申请号：US12685294
申请日：2010-01-11
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A bidirectional shift register includes first, second, third and four control signal bus lines for providing first, second, third and fourth control signals, Bi1, Bi2, Bi3 and Bi4, respectively, and a plurality of shift register stages electrically coupled in serial, each shift register stage having a first input node and a second input node, where the plurality of shift register stages is grouped into a first section and a second section, wherein the first and second input nodes of each shift register stage in the first section are electrically coupled to the first and second control signal bus lines for receiving the first and second control signals Bi1 and Bi2, respectively, and the first and second input nodes of each shift register stage in the second section are electrically coupled to the third and fourth control signal bus lines for receiving the third and fourth control signals Bi3 and Bi4, respectively.
摘要翻译： 双向移位寄存器包括用于分别提供第一，第二，第三和第四控制信号Bi1，Bi2，Bi3和Bi4的第一，第二，第三和第四控制信号总线，以及多个串联电耦合的移位寄存器级， 每个移位寄存器级具有第一输入节点和第二输入节点，其中多个移位寄存器级被分组为第一部分和第二部分，其中第一部分中每个移位寄存器级的第一和第二输入节点是 电耦合到第一和第二控制信号总线以分别接收第一和第二控制信号Bi1和Bi2，并且第二部分中每个移位寄存器级的第一和第二输入节点电耦合到第三和第四控制器 用于分别接收第三和第四控制信号Bi3和Bi4的信号总线。
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公开(公告)号：US20100259701A1
公开(公告)日：2010-10-14
申请号：US12508573
申请日：2009-07-24
IPC分类号： G02F1/1343
CPC分类号： G02F1/136286 , G09G3/3655 , G09G2300/0456 , G09G2320/0673
摘要： A liquid crystal display (LCD) is provided. The LCD includes a display panel and a voltage supply device (VSD). The display panel includes a plurality of scan lines, a plurality of data lines disposed substantially perpendicularly with the scan lines, and a plurality of pixels. The pixels are respectively electrically connected with the corresponding data line and the corresponding scan line, and are arranged in an array. Each of the pixels includes a common line and a compensation line, wherein the common line is located in the transparent area to receive a common voltage, and the compensation line is located in the reflection area to receive a stable voltage. The VSD is coupled to the compensation line of each of the pixels for continuously and correspondingly providing the stable voltage to the compensation line of each of the pixels.
摘要翻译： 提供液晶显示器（LCD）。 LCD包括显示面板和电压供应装置（VSD）。 显示面板包括多条扫描线，与扫描线大致垂直设置的多条数据线以及多个像素。 像素分别与相应的数据线和对应的扫描线电连接，并且被排列成阵列。 每个像素包括公共线和补偿线，其中公共线位于透明区域中以接收公共电压，并且补偿线位于反射区域中以接收稳定的电压。 VSD耦合到每个像素的补偿线，用于连续地并相应地将稳定的电压提供给每个像素的补偿线。
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公开(公告)号：US20100059758A1
公开(公告)日：2010-03-11
申请号：US12405247
申请日：2009-03-17
IPC分类号： H01L33/00 , H01L29/786
CPC分类号： H01L27/1255 , G02F1/136286 , H01L27/1214
摘要： A tri-gate pixel structure includes three sub-pixel regions, three gate lines, a data line, three thin film transistors (TFTs), three pixel electrodes, and a common line. The gate lines are disposed along a first direction, and the data line is disposed along a second direction. The TFTs are disposed in the sub-pixel regions respectively, wherein each TFT has a gate electrode electrically connected to a corresponding gate line, a source electrode electrically connected to the data line, and a drain electrode. The three pixel electrodes are disposed in the three sub-pixel regions respectively, and each pixel electrode is electrically connected to the drain electrode of one TFT respectively. The common line crosses the gate lines and partially overlaps the three gate lines, and the common line and the three pixel electrodes are partially overlapped to respectively form three storage capacitors.
摘要翻译： 三栅极像素结构包括三个子像素区域，三个栅极线，数据线，三个薄膜晶体管（TFT），三个像素电极和公共线。 栅极线沿着第一方向设置，并且数据线沿着第二方向设置。 TFT分别设置在子像素区域中，其中每个TFT具有电连接到相应的栅极线的栅电极，与数据线电连接的源电极和漏电极。 三个像素电极分别设置在三个子像素区域中，并且每个像素电极分别电连接到一个TFT的漏电极。 公共线与栅极线交叉并且部分地重叠三条栅极线，并且公共线和三个像素电极部分地重叠以分别形成三个存储电容器。
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9.发明授权Gate driver stage outputting multiple, partially overlapping gate-line signals to a liquid crystal display 有权栅极驱动器级将多个部分重叠的栅极线信号输出到液晶显示器公开(公告)号：US09030399B2
公开(公告)日：2015-05-12
申请号：US13403434
申请日：2012-02-23
CPC分类号： G09G3/20 , G09G3/3677 , G09G2310/0218 , G09G2310/0286
摘要： A gate driver for driving a TFT-LCD panel includes a number of gate-driver circuits arranged in groups and stages. Each gate-driver circuit has a main driver and an output section. The main driver is used to provide a charging signal to the output section which has two or more output circuits. Each of the output circuits is configured to provide a gate-line signal in response to the charging signal and a clock signal. The gate-driver circuit uses fewer switching elements, such as thin-film transistors, than the conventional circuit. When the gate driver is integrated in a TFT-LCD display panel and disposed within the periphery area around the display area, it is desirable to reduce or minimize the number of switching elements in the gate driver so that the periphery area can be reduced.
摘要翻译： 用于驱动TFT-LCD面板的栅极驱动器包括以组和阶段布置的多个栅极驱动器电路。 每个栅极驱动器电路具有主驱动器和输出部分。 主驱动器用于向具有两个或更多个输出电路的输出部分提供充电信号。 每个输出电路被配置为响应于充电信号和时钟信号提供栅极线信号。 栅极驱动器电路比常规电路使用更少的开关元件，例如薄膜晶体管。 当栅极驱动器集成在TFT-LCD显示面板中并且设置在显示区域周围的周边区域中时，期望减小或最小化栅极驱动器中的开关元件的数量，使得可以减小外围区域。
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10.发明授权Gate driving circuit having a shift register stage capable of pulling down gate signals of a plurality of shift register stages 有权门驱动电路具有能够拉低多个移位寄存器级的门信号的移位寄存器级公开(公告)号：US08411074B2
公开(公告)日：2013-04-02
申请号：US12488581
申请日：2009-06-21
申请人： Sheng-Chao Liu , Kuang-Hsiang Liu
发明人： Sheng-Chao Liu , Kuang-Hsiang Liu
CPC分类号： G09G3/20 , G09G3/3677 , G09G2300/0426 , G09G2310/0286 , G09G2310/0291
摘要： A high-reliability gate driving circuit includes a plurality of odd shift register stages and a plurality of even shift register stages. Each odd shift register stage generates a corresponding gate signal furnished to a corresponding odd gate line according to a first clock and a second clock having a phase opposite to the first clock, and further functions to pull down a gate signal of at least one even gate line or at least one odd gate line different from the corresponding odd gate line. Each even shift register stage generates a corresponding gate signal furnished to a corresponding even gate line according to a third clock and a fourth clock having a phase opposite to the third clock, and further functions to pull down a gate signal of at least one odd gate line or at least one even gate line different from the corresponding even gate line.
摘要翻译： 高可靠性门驱动电路包括多个奇数移位寄存器级和多个偶移位寄存器级。 每个奇数移位寄存器级产生根据第一时钟提供给相应奇数栅极线的相应门信号和具有与第一时钟相反的相位的第二时钟，并且还用于下拉至少一个偶数栅极的栅极信号 线或至少一个与相应的奇数行线不同的奇数行线。 每个偶移位寄存器级产生根据第三时钟提供给对应偶极线的相应门信号，以及具有与第三时钟相反的相位的第四时钟，并且还用于下拉至少一个奇数门的门信号 线或至少一个与相应的偶数栅极线不同的偶数栅极线。
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