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公开(公告)号:US20090075443A1
公开(公告)日:2009-03-19
申请号:US11963866
申请日:2007-12-24
申请人: Chia-Che Hsu , Rex Young , Pin-Yao Wang
发明人: Chia-Che Hsu , Rex Young , Pin-Yao Wang
IPC分类号: H01L21/8247
CPC分类号: H01L27/11521 , H01L27/115 , H01L29/40114
摘要: A method of fabricating a flash memory includes providing a substrate with a mask layer thereon, forming pluralities of shallow trenches in the substrate, forming a first oxide layer on the substrate and in the shallow trenches, removing a portion of the first oxide layer above the mask layer, forming a second oxide layer on the mask layer and the first oxide layer, wherein the first and second oxide layers have different etching ratios, removing a portion of the second oxide layer positioned above the mask layer so that an STI is formed with the first and the second oxide layers in each shallow trench, removing the mask layer to form recess portions between adjacent STIs, and filling the recess portions with a conductive layer to form floating gates in the recess portions.
摘要翻译: 制造闪速存储器的方法包括在其上提供掩模层的衬底,在衬底中形成多个浅沟槽,在衬底上和浅沟槽中形成第一氧化物层,在第一氧化物层的上方去除部分第一氧化物层 掩模层,在掩模层和第一氧化物层上形成第二氧化物层,其中第一和第二氧化物层具有不同的蚀刻比率,去除位于掩模层上方的第二氧化物层的一部分,使得STI形成有 每个浅沟槽中的第一和第二氧化物层,去除掩模层以形成相邻STI之间的凹部,并且用导电层填充凹部,以在凹部中形成浮栅。
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公开(公告)号:US07445998B2
公开(公告)日:2008-11-04
申请号:US11969918
申请日:2008-01-07
申请人: Rex Young , Pin-Yao Wang
发明人: Rex Young , Pin-Yao Wang
IPC分类号: H01L21/336
CPC分类号: H01L21/02057 , H01L21/02068 , H01L29/66181 , H01L29/66825
摘要: A method for fabricating a semiconductor device is described. The method includes providing a substrate having a trench therein, and a trench device in the trench. The trench device includes two gate structures disposed on the sidewalls of the trench, a doped region in the substrate between the gate structures and an inter-gate dielectric layer disposed on the surface of the gate structures. A thermal treatment process in a nitrogen-containing ambient is performed to remove the native oxide layer formed on the surface of the doped region. Then, a conductive layer is formed to fill in the trench.
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公开(公告)号:US20060166499A1
公开(公告)日:2006-07-27
申请号:US11161080
申请日:2005-07-22
申请人: Rex Young , Pin-Yao Wang
发明人: Rex Young , Pin-Yao Wang
IPC分类号: H01L21/44
CPC分类号: H01L21/02057 , H01L21/02068 , H01L29/66181 , H01L29/66825
摘要: A method for fabricating a semiconductor device is described. The method includes providing a substrate having a trench therein, and a trench device in the trench. The trench device includes two gate structures disposed on the sidewalls of the trench, a doped region in the substrate between the gate structures and an inter-gate dielectric layer disposed on the surface of the gate structures. A thermal treatment process in a nitrogen-containing ambient is performed to remove the native oxide layer formed on the surface of the doped region. Then, a conductive layer is formed to fill in the trench.
摘要翻译: 对半导体装置的制造方法进行说明。 该方法包括提供其中具有沟槽的衬底和沟槽中的沟槽器件。 沟槽器件包括设置在沟槽的侧壁上的两个栅极结构,在栅极结构之间的衬底中的掺杂区域和设置在栅极结构的表面上的栅极间电介质层。 进行含氮环境中的热处理工艺以去除在掺杂区域的表面上形成的自然氧化物层。 然后,形成导电层以填充沟槽。
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公开(公告)号:US20080102580A1
公开(公告)日:2008-05-01
申请号:US11969918
申请日:2008-01-07
申请人: Rex Young , Pin-Yao Wang
发明人: Rex Young , Pin-Yao Wang
IPC分类号: H01L21/336
CPC分类号: H01L21/02057 , H01L21/02068 , H01L29/66181 , H01L29/66825
摘要: A method for fabricating a semiconductor device is described. The method includes providing a substrate having a trench therein, and a trench device in the trench. The trench device includes two gate structures disposed on the sidewalls of the trench, a doped region in the substrate between the gate structures and an inter-gate dielectric layer disposed on the surface of the gate structures. A thermal treatment process in a nitrogen-containing ambient is performed to remove the native oxide layer formed on the surface of the doped region. Then, a conductive layer is formed to fill in the trench.
摘要翻译: 对半导体装置的制造方法进行说明。 该方法包括提供其中具有沟槽的衬底和沟槽中的沟槽器件。 沟槽器件包括设置在沟槽的侧壁上的两个栅极结构,在栅极结构之间的衬底中的掺杂区域和设置在栅极结构的表面上的栅极间电介质层。 进行含氮环境中的热处理工艺以去除在掺杂区域的表面上形成的自然氧化物层。 然后,形成导电层以填充沟槽。
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公开(公告)号:US06812120B1
公开(公告)日:2004-11-02
申请号:US10708351
申请日:2004-02-26
申请人: Rex Young , Pin-Yao Wang
发明人: Rex Young , Pin-Yao Wang
IPC分类号: H01L218247
CPC分类号: H01L29/66825 , H01L21/28273 , H01L29/42336 , Y10S438/963
摘要: A method of forming a floating gate of a memory cell is provided. A substrate having at least a trench is provided. Next, a tunnel oxide layer is formed on a surface of the trench. Next, a conductive layer is filled in the trench. Next, two-step etching process is carried out to form a first floating gate and a second floating gate having a top corner with sharp edge over the sidewalls of the trench.
摘要翻译: 提供一种形成存储单元的浮动栅极的方法。 提供具有至少沟槽的衬底。 接下来,在沟槽的表面上形成隧道氧化物层。 接下来,在沟槽中填充导电层。 接下来,进行两步蚀刻处理以形成第一浮栅和第二浮栅,其具有在沟槽的侧壁上具有尖锐边缘的顶角。
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公开(公告)号:US20070072369A1
公开(公告)日:2007-03-29
申请号:US11306213
申请日:2005-12-20
申请人: Rex Young , Pin-Yao Wang
发明人: Rex Young , Pin-Yao Wang
IPC分类号: H01L21/336 , H01L29/788
CPC分类号: H01L27/115 , H01L27/11521 , H01L29/7851
摘要: A non-volatile memory includes a substrate, a plurality of isolation layers, a plurality of active layers, a plurality of floating gates, a plurality of control gates and a plurality of doped regions. The active layers are disposed in the substrate between the isolation layers, and the top surface of the active layer is higher than that of the isolation layer. The active layers and the isolation layers are arranged in parallel to each other and extend in the first direction. The control gates are disposed in the substrate. The control gates are arranged in parallel and extend in the second direction which crosses the first direction. The floating gates are disposed between the active layers and the control gates. The doped regions are disposed in the active layers between the control gates.
摘要翻译: 非易失性存储器包括衬底,多个隔离层,多个有源层,多个浮置栅极,多个控制栅极和多个掺杂区域。 有源层设置在隔离层之间的衬底中,并且有源层的顶表面高于隔离层的顶表面。 有源层和隔离层彼此平行地布置并沿着第一方向延伸。 控制栅极设置在基板中。 控制门平行布置并沿与第一方向交叉的第二方向延伸。 浮动栅极设置在有源层和控制栅极之间。 掺杂区域设置在控制栅极之间的有源层中。
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公开(公告)号:US20090130808A1
公开(公告)日:2009-05-21
申请号:US11942718
申请日:2007-11-20
申请人: Chao-Yuan Lo , Rex Young , Pin-Yao Wang
发明人: Chao-Yuan Lo , Rex Young , Pin-Yao Wang
IPC分类号: H01L21/336
CPC分类号: H01L29/7881 , H01L27/11521 , H01L29/66825
摘要: A method of fabricating a flash memory includes successively forming a floating gate insulating layer, a floating gate material layer, a dielectric layer, a control gate material layer, a silicide layer, and a hard mask layer on a semiconductor substrate, patterning the hard mask layer, removing portions of the silicide layer, the control gate material layer, the dielectric layer, and the floating gate material layer not covered by the hard mask layer to form a stacked structure, forming a silicon cap layer covering the surface of the stacked structure, and performing a thermal process.
摘要翻译: 制造闪速存储器的方法包括在半导体衬底上依次形成浮置栅极绝缘层,浮栅材料层,电介质层,控制栅极材料层,硅化物层和硬掩模层,使硬掩模 除去未被硬掩模层覆盖的硅化物层的部分,控制栅材料层,电介质层和浮栅材料层,形成层叠结构,形成覆盖层叠结构的表面的硅覆盖层 ,并进行热处理。
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公开(公告)号:US20080224202A1
公开(公告)日:2008-09-18
申请号:US12129652
申请日:2008-05-29
申请人: Rex Young , Pin-Yao Wang
发明人: Rex Young , Pin-Yao Wang
IPC分类号: H01L29/788
CPC分类号: H01L27/115 , H01L27/11521 , H01L29/7851
摘要: A non-volatile memory includes a substrate, a number of isolation layers, a number of active layers, a number of floating gates, a number of control gates and a number of doped regions. The active layers are disposed in the substrate between the isolation layers, and the top surface of the active layer is higher than that of the isolation layer. The active layers and the isolation layers are arranged in parallel to each other and extend in the first direction. The control gates are disposed in the substrate. The control gates are arranged in parallel and extend in the second direction which crosses the first direction. The floating gates are disposed between the active layers and the control gates. The doped regions are disposed in the active layers between the control gates.
摘要翻译: 非易失性存储器包括衬底,多个隔离层,多个有源层,多个浮置栅极,多个控制栅极和多个掺杂区域。 有源层设置在隔离层之间的衬底中,并且有源层的顶表面高于隔离层的顶表面。 有源层和隔离层彼此平行地布置并沿着第一方向延伸。 控制栅极设置在基板中。 控制门平行布置并沿与第一方向交叉的第二方向延伸。 浮动栅极设置在有源层和控制栅极之间。 掺杂区域设置在控制栅极之间的有源层中。
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公开(公告)号:US07354851B2
公开(公告)日:2008-04-08
申请号:US11161080
申请日:2005-07-22
申请人: Rex Young , Pin-Yao Wang
发明人: Rex Young , Pin-Yao Wang
IPC分类号: H01L21/4763
CPC分类号: H01L21/02057 , H01L21/02068 , H01L29/66181 , H01L29/66825
摘要: A method for fabricating a semiconductor device is described. The method includes providing a substrate having a trench therein, and a trench device in the trench. The trench device includes two gate structures disposed on the sidewalls of the trench, a doped region in the substrate between the gate structures and an inter-gate dielectric layer disposed on the surface of the gate structures. A thermal treatment process in a nitrogen-containing ambient is performed to remove the native oxide layer formed on the surface of the doped region. Then, a conductive layer is formed to fill in the trench.
摘要翻译: 对半导体装置的制造方法进行说明。 该方法包括提供其中具有沟槽的衬底和沟槽中的沟槽器件。 沟槽器件包括设置在沟槽的侧壁上的两个栅极结构,在栅极结构之间的衬底中的掺杂区域和设置在栅极结构的表面上的栅极间电介质层。 进行含氮环境中的热处理工艺以去除在掺杂区域的表面上形成的自然氧化物层。 然后,形成导电层以填充沟槽。
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公开(公告)号:US20140282549A1
公开(公告)日:2014-09-18
申请号:US14292721
申请日:2014-05-30
申请人: Rex Young
发明人: Rex Young
IPC分类号: G06F9/455
CPC分类号: G06F9/541 , G06F9/4482 , G06F9/45504
摘要: Technology is disclosed for processing in a computer program a request received by a service virtual machine (SVM). The technology can receive a request in either a first form or a second form, wherein the first form includes a target textual identifier, a reply-to textual identifier, and a parameter, and the second form includes a target textual identifier and a parameter, but not a reply-to textual identifier; identify, based on the received target textual identifier, a procedure; invoke the identified procedure and providing a value of the received parameter to the invoked procedure; in an event the received request is in the first form: receive a result from the invoked procedure; form a reply-to request in the second form, the second form including as a target textual identifier the reply-to textual identifier in the received request, and as a parameter the result received from the invoked procedure, further wherein the second form does not include a reply-to textual identifier; and send, to the SVM, the formed reply-to request.
摘要翻译: 公开了用于在计算机程序中处理由服务虚拟机(SVM)接收的请求的技术。 该技术可以以第一形式或第二形式接收请求,其中第一形式包括目标文本标识符,答复文本标识符和参数,并且第二形式包括目标文本标识符和参数, 但不是回复文本标识符; 根据接收到的目标文本标识符识别一个过程; 调用所识别的过程并将所接收的参数的值提供给被调用的过程; 在接收到的请求处于第一种形式的情况下:从调用的过程接收结果; 以所述第二形式形成答复请求,所述第二表格包括作为所述接收到的请求中的所述答复文本标识符的目标文本标识符,以及作为从所述被调用过程接收的结果的参数,其中,所述第二形式不 包括回复文本标识符; 并向SVM发送形成的回复请求。
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