公开(公告)号：US08106461B2

公开(公告)日：2012-01-31

申请号：US12887615

申请日：2010-09-22

申请人： Chia-Lin Chen ,  Yi-Miaw Lin ,  Ming-Chen Chen

发明人： Chia-Lin Chen ,  Yi-Miaw Lin ,  Ming-Chen Chen

IPC分类号： H01L29/40

CPC分类号： G01R31/2642 ,  G01R31/2858 ,  G01R31/3008

摘要： An apparatus comprises a circuit for measuring a gate leakage current of a plurality of transistors. A circuit is provided to apply heat to gates of the plurality of transistors. A circuit is provided to apply a single stress bias voltage to the plurality of transistors for a stress period t. The stress bias voltage is sufficient to cause a 10% degradation in a drive current of the transistor within the stress period t. A processor is provided for estimating a negative bias temperature instability (NBTI) lifetime τ of the transistor based on a relationship between the gate leakage current and one or more of the group consisting of gate voltage, gate length, gate temperature, and gate width of the plurality of transistors. The relationship is determined from data observed while applying the single stress bias voltage.

摘要翻译： 一种装置包括用于测量多个晶体管的栅极漏电流的电路。 提供电路以向多个晶体管的栅极施加热量。 提供电路以在单个应力偏置电压施加到多个晶体管的应力周期t。 应力偏置电压足以在应力周期t内导致晶体管的驱动电流10％的降低。 提供一种处理器，用于基于栅极泄漏电流与栅极电压，栅极长度，栅极温度和栅极宽度之间的一个或多个的关系来估计晶体管的负偏置温度不稳定性（NBTI）寿命τ 多个晶体管。 该关系是从应用单个应力偏置电压时观察到的数据确定的。

公开(公告)号：US07820457B2

公开(公告)日：2010-10-26

申请号：US11556489

申请日：2006-11-03

申请人： Chia-Lin Chen ,  Yi-Miaw Lin ,  Ming-Chen Chen

发明人： Chia-Lin Chen ,  Yi-Miaw Lin ,  Ming-Chen Chen

IPC分类号： G01R31/26

CPC分类号： G01R31/2642 ,  G01R31/2858 ,  G01R31/3008

摘要： A method includes measuring a gate leakage current of a plurality of transistors. A single stress bias voltage is applied to the plurality of transistors. The stress bias voltage causes a 10% degradation in a drive current of each transistor within a respective stress period t. One or more relationships are determined, between the measured gate leakage current and one or more of the group consisting of gate voltage, gate length, gate temperature, and gate width of the plurality of transistors, respectively. A negative bias temperature instability (NBTI) lifetime τ of the plurality of transistors is estimated, based on the measured gate leakage current and the one or more relationships.

摘要翻译： 一种方法包括测量多个晶体管的栅极漏电流。 单个应力偏置电压被施加到多个晶体管。 应力偏置电压在相应的应力周期t内导致每个晶体管的驱动电流10％的劣化。 在测量的栅极漏电流和分别由多个晶体管的栅极电压，栅极长度，栅极温度和栅极宽度的组中的一个或多个之间确定一个或多个关系。 基于所测量的栅极泄漏电流和一个或多个关系，估计多个晶体管的负偏置温度不稳定性（NBTI）寿命τ。

公开(公告)号：US20070238200A1

公开(公告)日：2007-10-11

申请号：US11556489

申请日：2006-11-03

申请人： Chia-Lin Chen ,  Y. M. Lin ,  Ming-Chen Chen

发明人： Chia-Lin Chen ,  Y. M. Lin ,  Ming-Chen Chen

IPC分类号： H01L21/00

CPC分类号： G01R31/2642 ,  G01R31/2858 ,  G01R31/3008

摘要： A method includes measuring a gate leakage current of a plurality of transistors. A single stress bias voltage is applied to the plurality of transistors. The stress bias voltage causes a 10% degradation in a drive current of each transistor within a respective stress period t. One or more relationships are determined, between the measured gate leakage current and one or more of the group consisting of gate voltage, gate length, gate temperature, and gate width of the plurality of transistors, respectively. A negative bias temperature instability (NBTI) lifetime τ of the plurality of transistors is estimated, based on the measured gate leakage current and the one or more relationships.

摘要翻译： 一种方法包括测量多个晶体管的栅极漏电流。 单个应力偏置电压被施加到多个晶体管。 应力偏置电压在相应的应力周期t内导致每个晶体管的驱动电流10％的劣化。 在测量的栅极漏电流和分别由多个晶体管的栅极电压，栅极长度，栅极温度和栅极宽度的组中的一个或多个之间确定一个或多个关系。 基于所测量的栅极泄漏电流和一个或多个关系，估计多个晶体管的负偏压温度不稳定性（NBTI）寿命ττ。

公开(公告)号：US07268575B1

公开(公告)日：2007-09-11

申请号：US11278827

申请日：2006-04-06

申请人： Chia-Lin Chen ,  Ming-Chen Chen

发明人： Chia-Lin Chen ,  Ming-Chen Chen

IPC分类号： G01R31/26

CPC分类号： G01R31/2642 ,  G01R31/2858 ,  G01R31/3008

摘要： A method includes measuring a gate leakage current of at least one transistor. A single stress bias voltage is applied to the at least one transistor at a given temperature for a stress period t. The stress bias voltage causes a 10% degradation in a drive current of the transistor at the given temperature within the stress period t. A negative bias temperature instability (NBTI) lifetime τ of the transistor is estimated based on the measured gate leakage current and a relationship between drive current degradation and time observed during the applying step.

摘要翻译： 一种方法包括测量至少一个晶体管的栅极漏电流。 在给定温度下，对于至少一个晶体管施加单个应力偏置电压以施加应力周期t。 应力偏置电压在应力周期t内的给定温度下导致晶体管的驱动电流降低10％。 基于所测量的栅极泄漏电流和驱动电流劣化与施加步骤期间观察到的时间之间的关系来估计晶体管的负偏置温度不稳定性（NBTI）寿命ττ。

公开(公告)号：US5555994A

公开(公告)日：1996-09-17

申请号：US506559

申请日：1995-07-25

申请人： Ming-Chen Chen

发明人： Ming-Chen Chen

IPC分类号： A47J36/06 ,  A47J27/00 ,  B65D51/00

CPC分类号： A47J36/06 ,  Y10S220/912

摘要： A dome cover for cooking utensils, including a dome-like cover body made from a meshed steel plate by stamping and defining a plurality of small open spaces in it, and a knob raised from the top center of the dome-like cover body, the dome-like cover body having a stepped outward flange around the border, which stepped outward flange has a rim around the border reinforced by a steel wire.

摘要翻译： 一种用于炊具的圆顶盖，包括由网状钢板制成的圆顶状盖体，通过冲压并在其中限定多个小的开放空间，以及从圆顶状盖体的顶部中心凸起的旋钮， 围绕边界的具有阶梯状向外的凸缘的圆顶状盖体具有沿着钢丝线加强边界的边缘。