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公开(公告)号:US20130087861A1
公开(公告)日:2013-04-11
申请号:US13267068
申请日:2011-10-06
申请人: Chieh-Te CHEN , Shih-Fang Tzou , Jiunn-Hsiung Liao , Yi-Po Lin
发明人: Chieh-Te CHEN , Shih-Fang Tzou , Jiunn-Hsiung Liao , Yi-Po Lin
IPC分类号: H01L27/10 , H01L21/8234
CPC分类号: H01L21/28079 , H01L21/027 , H01L21/3212 , H01L21/32139 , H01L21/8232 , H01L27/0629
摘要: A semiconductor device comprises a metal gate electrode, a passive device and a hard mask layer. The passive device has a poly-silicon element layer. The hard mask layer is disposed on the metal gate electrode and the passive electrode and has a first opening and a second opening substantially coplanar with each other, wherein the metal gate electrode and the poly-silicon element layer are respectively exposed via the first opening and the second opening; and there is a distance between the first opening and the metal gate electrode substantially less than the distance between the second opening and the poly-silicon element layer.
摘要翻译: 半导体器件包括金属栅电极,无源器件和硬掩模层。 无源器件具有多晶硅元件层。 硬掩模层设置在金属栅电极和无源电极上,并且具有彼此基本共面的第一开口和第二开口,其中金属栅极电极和多晶硅元件层分别经由第一开口暴露, 第二个开口 并且第一开口和金属栅电极之间的距离基本上小于第二开口和多晶硅元件层之间的距离。
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公开(公告)号:US20130005151A1
公开(公告)日:2013-01-03
申请号:US13174875
申请日:2011-07-01
申请人: Chieh-Te CHEN , Yi-Po Lin , Feng-Yih Chang , Chih-Wen Feng , Shang-Yuan Tsai
发明人: Chieh-Te CHEN , Yi-Po Lin , Feng-Yih Chang , Chih-Wen Feng , Shang-Yuan Tsai
IPC分类号: H01L21/311
CPC分类号: H01L21/31144 , H01L21/76816
摘要: In an exemplary method for forming contact holes, a substrate overlaid with an etching stop layer and an interlayer dielectric layer in that order is firstly provided. A first etching process then is performed to form at least a first contact opening in the interlayer dielectric layer. A first carbon-containing dielectric layer subsequently is formed overlying the interlayer dielectric layer and filling into the first contact opening. After that, a first anti-reflective layer and a first patterned photo resist layer are sequentially formed in that order overlying the carbon-containing dielectric layer. Next, a second etching process is performed by using the first patterned photo resist layer as an etching mask to form at least a second contact opening in the interlayer dielectric layer.
摘要翻译: 在形成接触孔的示例性方法中,首先提供覆盖有蚀刻停止层和层间电介质层的基板。 然后执行第一蚀刻工艺以在层间电介质层中形成至少第一接触开口。 随后形成第一含碳介电层,覆盖层间电介质层并填充到第一接触开口中。 之后,依次形成第一抗反射层和第一图案化光致抗蚀剂层,以覆盖含碳电介质层的顺序。 接下来,通过使用第一图案化光致抗蚀剂层作为蚀刻掩模来进行第二蚀刻工艺,以在层间电介质层中形成至少第二接触开口。
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