公开(公告)号：US20240266199A1

公开(公告)日：2024-08-08

申请号：US18531854

申请日：2023-12-07

申请人： Samsung Display Co., LTD.

发明人： Je Hyeon YOON

IPC分类号： H01L21/68 ,  G06T7/33 ,  H01L21/027

CPC分类号： H01L21/682 ,  G06T7/33 ,  H01L21/027 ,  G06T2207/30148

摘要： An alignment apparatus includes a support substrate having a first alignment mark formed thereon, and a wafer mounted on the support substrate as aligned to the first alignment mark. The first alignment mark includes a first mark extending in a first direction, a second mark extending in a second direction and intersecting the first mark at a side of the first mark, and a third mark extending in the second direction and intersecting the first mark at another side of the first mark.

公开(公告)号：US20240153755A1

公开(公告)日：2024-05-09

申请号：US18321378

申请日：2023-05-22

申请人： Samsung Electronics Co., Ltd.

发明人： JIEUN LEE ,  JINPYOUNG KIM ,  JIEUN SONG ,  JANGHOON KIM ,  WOOJIN JUNG

IPC分类号： H01L21/02 ,  B08B3/08 ,  H01L21/027 ,  H01L21/311 ,  H01L21/3213

CPC分类号： H01L21/0206 ,  B08B3/08 ,  H01L21/027 ,  H01L21/31144 ,  H01L21/32139 ,  G03F7/40

摘要： A method of manufacturing a semiconductor device includes: forming a pattern formation material layer on a substrate; forming a photoresist on the pattern formation material layer; exposing and developing the photoresist to form a photoresist pattern; performing a first deionized water cleaning on the photoresist pattern; cleaning the photoresist pattern with a cleaning solution including a surfactant; and performing a second deionized water cleaning on the photoresist pattern.

公开(公告)号：US11978643B2

公开(公告)日：2024-05-07

申请号：US17845119

申请日：2022-06-21

申请人： CHANGXIN MEMORY TECHNOLOGIES, INC.

发明人： Xiaojie Li ,  Dahan Qian

IPC分类号： H01L21/477 ,  C23C16/455 ,  H01L21/02 ,  H01L21/027 ,  H01L21/302

CPC分类号： H01L21/477 ,  C23C16/45525 ,  H01L21/02365 ,  H01L21/027 ,  H01L21/302

摘要： Method for manufacturing a semiconductor device includes: forming a first area and a second area of a peripheral area on a substrate; forming a first lamination structure in the first area, and forming a second lamination structure in an array area and the second area; performing thermal treatment on the substrate so that atoms in a work function layer are diffused into a second dielectric layer, and an interface interaction occurs between the second dielectric layer and a first dielectric layer; removing the first lamination structure to the second dielectric layer, and removing the second lamination structure to the second dielectric layer; forming a fourth barrier layer and a second conductive layer, a content ratio of metallic element to non-metallic element in a first barrier layer being less than a content ratio of metallic element to non-metallic element in a second barrier layer and a third barrier layer.

公开(公告)号：US11948803B2

公开(公告)日：2024-04-02

申请号：US17410432

申请日：2021-08-24

申请人： Modulight Corporation

发明人： Riina Ulkuniemi ,  Ville Vilokkinen ,  Petri Melanen

IPC分类号： H01L21/308 ,  H01L21/027 ,  H01L21/3065 ,  H01L21/311

CPC分类号： H01L21/308 ,  H01L21/027 ,  H01L21/3065 ,  H01L21/311

摘要： A method for passivating sidewalls of patterned semiconductor wafer including ridge(s). The method includes: depositing first layer of first dielectric material on pattern surface of said wafer; etching portion of first layer to obtain tapered portions of first dielectric material along sidewall(s) of ridge(s); depositing second layer of second dielectric material on tapered portions and said wafer; depositing photo-sensitive material on second layer; aligning mask with photo-sensitive material, wherein portion(s) of photo-sensitive material corresponding to top surface of ridge(s) is/are unmasked, and remaining portion is masked; applying developing solution and exposing photo-sensitive material to remove portion(s) of photo-sensitive material; etching portion(s) of second layer that is/are deposited on top surface of ridge(s); and removing photo-sensitive material.

公开(公告)号：US11935746B2

公开(公告)日：2024-03-19

申请号：US17341332

申请日：2021-06-07

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chun-Yi Chang ,  Chunyao Wang

IPC分类号： H01L21/027 ,  H01L21/308 ,  H01L21/477 ,  H01L29/66

CPC分类号： H01L21/027 ,  H01L21/3086 ,  H01L21/477 ,  H01L29/66795

摘要： As deposited, hard mask thin films have internal stress components which are an artifact of the material, thickness, deposition process of the mask layer as well as of the underlying materials and topography. This internal stress can cause distortion and twisting of the mask layer when it is patterned, especially when sub-micron critical dimensions are being patterned. A stress-compensating process is employed to reduce the impact of this internal stress. Heat treatment can be employed to relax the stress, as an example. In another example, a second mask layer with an opposite internal stress component is employed to offset the internal stress component in the hard mask layer.

公开(公告)号：US11915942B2

公开(公告)日：2024-02-27

申请号：US17855216

申请日：2022-06-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chia-Cheng Chen ,  Wei-Ting Chien ,  Liang-Yin Chen ,  Huicheng Chang ,  Yee-Chia Yeo

IPC分类号： G03F7/20 ,  H01L21/32 ,  H01L21/027 ,  G03F7/00

CPC分类号： H01L21/32 ,  G03F7/70283 ,  H01L21/027

摘要： A method of exposing a wafer to a high-tilt angle ion beam and an apparatus for performing the same are disclosed. In an embodiment, a method includes forming a patterned mask layer over a wafer, the patterned mask layer including a patterned mask feature; exposing the wafer to an ion beam, a surface of the wafer being tilted at a tilt angle with respect to the ion beam; and moving the wafer along a scan line with respect to the ion beam, a scan angle being defined between the scan line and an axis perpendicular to an axis of the ion beam, a difference between the tilt angle and the scan angle being less than 50°.

公开(公告)号：US11888093B2

公开(公告)日：2024-01-30

申请号：US17389029

申请日：2021-07-29

申请人： Applied Materials, Inc.

发明人： Daihua Zhang ,  Yingdong Luo ,  Mingwei Zhu ,  Hou T. Ng ,  Sivapackia Ganapathiappan ,  Nag B. Patibandla

IPC分类号： H01L33/44 ,  H01L33/50 ,  H01L25/075 ,  H01L33/58 ,  H01L33/62 ,  H01L33/00 ,  H01L21/70 ,  H01L21/02 ,  H01L21/027 ,  H01L27/15

CPC分类号： H01L33/44 ,  H01L21/027 ,  H01L21/02104 ,  H01L21/70 ,  H01L21/707 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/00 ,  H01L33/0093 ,  H01L33/505 ,  H01L33/58 ,  H01L33/62 ,  H01L2933/0041 ,  H01L2933/0058 ,  H01L2933/0066

摘要： A multi-color display includes a backplane having backplane circuitry, an array of micro-LEDs electrically integrated with backplane circuitry of the backplane, a first color conversion layer over each of a first plurality of light emitting diodes, a second color conversion layer over each of a second plurality of light emitting diodes, and a plurality of isolation walls separating adjacent micro-LEDs of the array. The micro-LEDs of the array are configured to generate illumination of the same wavelength range, the first color conversion layer converts the illumination to light of a first color, and the second color conversion layer converts the illumination to light of a different second color.

公开(公告)号：US11833736B2

公开(公告)日：2023-12-05

申请号：US16808430

申请日：2020-03-04

申请人： CANON KABUSHIKI KAISHA

发明人： Yoshihiro Koura ,  Kunihiko Asada

IPC分类号： B29C59/02 ,  G03F7/00 ,  H01L21/027

CPC分类号： B29C59/02 ,  G03F7/0002 ,  H01L21/027

摘要： A method of controlling an imprint process to form a pattern by using a mold on a substrate is provided. The method includes inspecting to determine whether to continue or stop a series of imprint processes during the series of imprint processes of a lot, wherein the inspecting includes capturing an image of the pattern formed on a shot region by the imprint process, obtaining, by comparing a position of a peripheral portion of the pattern in the image and a design value of the position of the peripheral portion, an extrusion amount of an imprint material from the shot region due to the imprint process, and determining, based on a change in the extrusion amount over a plurality of imprint processes, a next process to transition from a current process upon stopping the series of imprint processes.

公开(公告)号：US11830927B2

公开(公告)日：2023-11-28

申请号：US17574899

申请日：2022-01-13

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Cheng-Hsien Wu

IPC分类号： H01L29/66 ,  H01L29/165 ,  H01L21/02 ,  H01L29/423 ,  H01L29/78 ,  H01L21/311 ,  H01L21/027 ,  H01L29/06 ,  B82Y10/00 ,  H01L21/3115 ,  H01L29/786 ,  H01L29/775 ,  H01L29/08 ,  H01L29/40 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/088 ,  H01L27/092 ,  H01L27/12 ,  H01L29/417

CPC分类号： H01L29/66545 ,  B82Y10/00 ,  H01L21/027 ,  H01L21/0226 ,  H01L21/02164 ,  H01L21/02321 ,  H01L21/3115 ,  H01L21/31116 ,  H01L21/823431 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/401 ,  H01L29/41791 ,  H01L29/42316 ,  H01L29/42372 ,  H01L29/42392 ,  H01L29/6681 ,  H01L29/66439 ,  H01L29/66553 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785 ,  H01L29/78696

摘要： A method includes: forming a dummy gate dielectric layer over a channel region of a fin structure; forming a dummy gate over the dummy gate dielectric layer; removing the dummy gate and a first portion of the dummy gate dielectric layer to expose the channel region of the fin structure; removing a first nanowire of the fin structure above a second nanowire of the fin structure to remain the second nanowire of the fin structure; forming an interfacial layer surrounding the second nanowire; forming a material layer comprising dopants over the interfacial layer; and performing an annealing process to drive the dopants of the material layer into the interfacial layer, thereby forming a doped interfacial layer surrounding the second nanowire.

公开(公告)号：US11747721B2

公开(公告)日：2023-09-05

申请号：US17154279

申请日：2021-01-21

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Useong Kim ,  Mincheol Kang ,  Woojoo Sim

IPC分类号： G03F7/20 ,  G06N3/08 ,  G03F1/36 ,  G03F7/00 ,  H01L21/027

CPC分类号： G03F1/36 ,  G03F7/70308 ,  G03F7/70441 ,  G06N3/08 ,  H01L21/027

摘要： Provided are a method of forming a mask, the method accurately and quickly restoring an image on the mask to the shape on the mask, and a mask manufacturing method using the method of forming the mask. The method of forming a mask includes obtaining first images by performing rasterization and image correction on shapes on the mask corresponding to first patterns on a wafer, obtaining second images by applying a transformation to the shapes on the mask, performing deep learning based on a transformation relationship between ones of the first images and ones of the second images corresponding to the first images, and forming a target shape on the mask corresponding to a target pattern on the wafer, based on the deep learning. The mask is manufactured based on the target shape on the mask.