Abstract:
An overlay mark arrangement for reducing the asymmetric profile and an overlay shift during an integrated circuit manufacturing process is disclosed. In one embodiment, the overlay mark arrangement may comprise a first mark, a second mark and a stress releasing means. The first mark is used to indicate the position of a lower layer, the second mark is used to indicate the position of an upper layer; and the stress releasing means is used to release the film stress induced by the upper layer. Unlike the conventional overlay mark arrangements, which will have a severe overlay mark shift due to the film stress, the asymmetric overlay mark profile can be improved by using multiple trenches around the overlay marks according to certain embodiments of the invention disclosed herein.
Abstract:
Pattern registration marks which include: a substrate and an upper material layer disposed above the substrate; an outer trench formed in the upper material layer, the outer trench having an outer trench width; an inner trench formed in the upper material layer, the inner trench having an inner trench width; and a conformal layer disposed in the inner trench and the outer trench, the conformal layer having a conformal layer thickness; wherein the outer trench width is greater than twice the conformal layer thickness, and wherein the inner trench width is less than or equal to twice the conformal layer thickness; and methods of using the same.
Abstract:
A method for forming photo patterns on a photoresist layer is disclosed. A photoresist layer is formed over a substrate. The photoresist layer is then treated with a basic compound and is exposed. The photoresist layer can be treated with a basic compound first, and then exposed. The photoresist layer can also be exposed first, and then treated with a basic compound. The basic compound treatment for the photoresist layer can be performed by using a basic compound in the form of liquid or gas, and it can also be performed by forming a basic compound layer over the photoresist layer. The basic compound can be an amine compound. The mask used during an exposure may contain anti-assist feature (AF), and it can also be a half tone phase shift mask (HTPSM). Thus, the method can prevent anti-AF and side lobe from printing out.
Abstract:
An improved photolithography method and mask are disclosed. The method exposes a substrate coated with a photosensitive material using a first mask. The photosensitive material after said first exposure includes one or more under-exposed or incompletely exposed portions or one or more portions prone to peeling. The under-exposed or incompletely exposed portions or portions prone to peeling are subjected to a second exposure using a second mask. The second mask includes a pattern for projecting an image on the substrate coated with the photosensitive material. The image corresponds to areas of the photosensitive material that have been under-exposed or incompletely exposed or areas prone to peeling.
Abstract:
A method for forming a shallow trench isolation (STI) structure is provided. A pad oxide layer and a nitride silicon layer are formed on a provided substrate sequentially. The pad oxide layer, the nitride silicon layer and the substrate are then etched to form a trench. An oxide liner and a nitride liner are formed in the trench. A self-align photo process is implemented and the nitride liner is then etched to expose the oxide liner.
Abstract:
An oriented assist feature is described that permits transferring a lithographic pattern from a to an integrated circuit. The oriented assist feature does not exhibit a forbidden pitch phenomenon, thereby providing a wide photo process window for a hole pattern.
Abstract:
A method for forming photo patterns on a photoresist layer is disclosed. A photoresist layer is formed over a substrate. The photoresist layer has a first photo region and a second photo region. A first exposure is performed to define a through pitch pattern at the first photo region and a second exposure is performed to define a dense pattern at the second photo region. The first exposure is performed by weak off-axis illumination (OAI) or disk illumination mode with a half tone phase shift mask (HTPSM). The second exposure is performed by strong OAI with HTPSM. In another embodiment, the second exposure is performed by disk illumination mode with a Levenson phase shift mask (PSM).
Abstract:
The present invention discloses a mask for reducing the proximity effect. The mask comprises a plurality of line-shaped features, a plurality of first assist features positioned between the line-shaped features and a plurality of second assist features positioned between the line-shaped feature and the first assist feature. The line-shaped feature corresponds to isolation trenches to be formed on a silicon wafer. The first assist feature is rectangular in shape and has a larger width at the direction perpendicular to the line-shaped features. The width of the second assist feature is smaller than two-fifths of the wavelength but larger than one-fourth of the wavelength of an exposure source. The size of the first assist feature and the second assist feature is so designed to be non-resolvable, while the line-shaped feature is resolvable and transferred to the silicon wafer.