Output buffering circuit, amplifier device, and display device with reduced power consumption
    1.
    发明授权
    Output buffering circuit, amplifier device, and display device with reduced power consumption 有权
    输出缓冲电路,放大器器件和显示器件,功耗降低

    公开(公告)号:US08284186B2

    公开(公告)日:2012-10-09

    申请号:US12357020

    申请日:2009-01-21

    IPC分类号: G09G5/00

    摘要: An output buffering circuit of a driver device for a display includes a first amplifier circuit having a first input stage, coupled between an upper power supply and a lower power supply, and a first output stage, coupled between the upper power supply and a first intermediate power supply that is greater than the lower power supply, and a second amplifier circuit having a second input stage coupled between the upper power supply and the lower power supply, and a second output stage coupled between a second intermediate power supply that is lower than the upper power supply and the lower power supply.

    摘要翻译: 用于显示器的驱动器装置的输出缓冲电路包括:第一放大器电路,具有耦合在上电源和下电源之间的第一输入级和耦合在上电源和第一中间电路之间的第一输出级 电源大于较低电源,以及第二放大器电路,其具有耦合在上电源和下电源之间的第二输入级,以及耦合在低于第二中间电源的第二中间电源之间的第二输出级 上电源和较低电源。

    OUTPUT BUFFERING CIRCUIT, AMPLIFIER DEVICE, AND DISPLAY DEVICE WITH REDUCED POWER CONSUMPTION
    2.
    发明申请
    OUTPUT BUFFERING CIRCUIT, AMPLIFIER DEVICE, AND DISPLAY DEVICE WITH REDUCED POWER CONSUMPTION 有权
    具有降低功耗的输出缓冲电路,放大器装置和显示装置

    公开(公告)号:US20100182307A1

    公开(公告)日:2010-07-22

    申请号:US12357020

    申请日:2009-01-21

    IPC分类号: G09G5/00

    摘要: An output buffering circuit of a driver device for a display includes a first amplifier circuit having a first input stage, coupled between an upper power supply and a lower power supply, and a first output stage, coupled between the upper power supply and a first intermediate power supply that is greater than the lower power supply, and a second amplifier circuit having a second input stage coupled between the upper power supply and the lower power supply, and a second output stage coupled between a second intermediate power supply that is lower than the upper power supply and the lower power supply.

    摘要翻译: 用于显示器的驱动器装置的输出缓冲电路包括:第一放大器电路,具有耦合在上电源和下电源之间的第一输入级和耦合在上电源和第一中间电路之间的第一输出级 电源大于较低电源,以及第二放大器电路,其具有耦合在上电源和下电源之间的第二输入级,以及耦合在低于第二中间电源的第二中间电源之间的第二输出级 上电源和较低电源。

    DIGITAL-TO-ANALOG CONVERTER HAVING EFFICIENT SWITCH CONFIGURATION
    3.
    发明申请
    DIGITAL-TO-ANALOG CONVERTER HAVING EFFICIENT SWITCH CONFIGURATION 有权
    具有有效开关配置的数字到模拟转换器

    公开(公告)号:US20100141494A1

    公开(公告)日:2010-06-10

    申请号:US12330527

    申请日:2008-12-09

    申请人: Ching-Chung Lee

    发明人: Ching-Chung Lee

    IPC分类号: H03M1/12

    CPC分类号: H03M1/682 H03M1/765

    摘要: A DAC includes a gamma voltage generator for generating a plurality of gamma voltages, and a decoder for receiving an M-bit digital value for selecting one of the gamma voltages, wherein the decoder comprises a first thermometer encoder, a first selector and a second selector. The first thermometer encoder is utilized to receive N bits of the digital value to generate a first thermometer code with 2N bits, wherein N is smaller than M, and M and N are positive integers. The first selector has a plurality of selecting groups, each selecting group having 2N switches controlled by the first thermometer code to output one gamma voltage, where the second selector receives the gamma voltages outputted by the selecting groups of the first selector and outputs one gamma voltage selected from the received gamma voltages based on the (M−N) bit of the digital value.

    摘要翻译: DAC包括用于产生多个伽马电压的伽马电压发生器和用于接收用于选择伽马电压之一的M位数字值的解码器,其中解码器包括第一温度计编码器,第一选择器和第二选择器 。 第一温度计编码器用于接收数字值的N位以产生具有2N位的第一温度计代码,其中N小于M,M和N是正整数。 第一选择器具有多个选择组,每个选择组具有由第一温度计代码控制的2N个开关,以输出一个伽马电压,其中第二选择器接收由第一选择器的选择组输出的伽马电压并输出一个伽马电压 基于数字值的(M-N)比特从接收的伽马电压中选择。

    Electronic stabilizer
    4.
    发明授权
    Electronic stabilizer 失效
    电子稳定器

    公开(公告)号:US06584000B1

    公开(公告)日:2003-06-24

    申请号:US10050294

    申请日:2002-01-18

    申请人: Ching-Chung Lee

    发明人: Ching-Chung Lee

    IPC分类号: H02M7538

    CPC分类号: H05B41/2821

    摘要: An electronic stabilizer includes an output transformer, a variable frequency/power amplifying loop, a low voltage variable frequency rectifying loop, and two elements of high resistance value. The primary side of the output transformer is connected with the variable frequency/power amplifying loop. The secondary side of the output transformer is connected with the low voltage variable frequency rectifying loop and the voltage boosting and lamp lighting loop. The elements of high resistance value are connected with the nodes of the various frequency/power amplifying loop and the low voltage variable frequency rectifying loop. The electronic stabilizer is adapted to an environment of direct current low voltage or direct current high voltage in which a low voltage bias current is provided to drive a lamp.

    摘要翻译: 电子稳定器包括输出变压器,可变频率/功率放大环路,低压可变频率整流回路和两个高电阻值的元件。 输出变压器的初级侧与变频/功率放大环路相连。 输出变压器的二次侧与低压可变频率整流回路和升压灯和灯管回路连接。 高电阻值的元件与各种频率/功率放大环路和低压可变频率整流回路的节点相连。 电子稳定器适用于提供低电压偏置电流以驱动灯的直流低电压或直流高电压的环境。

    Digital to analog converter
    5.
    发明授权
    Digital to analog converter 有权
    数模转换器

    公开(公告)号:US07859445B1

    公开(公告)日:2010-12-28

    申请号:US12491421

    申请日:2009-06-25

    申请人: Ching-Chung Lee

    发明人: Ching-Chung Lee

    IPC分类号: H03M1/66

    CPC分类号: H03M1/76

    摘要: An embodiment of a digital to analog converter (DAC) with two outputs is provided. The DAC is controlled by an n-bits input signal and comprises a reference voltage circuit generating (2n+1) reference voltages, a first switch array and a second switch array. The first switch array receives and outputs 2n selected reference voltages among the (2n+1) reference voltages to the second switch array. The second switch array outputs a first voltage via a first output terminal and a second voltage via a second output terminal according to the input signal, wherein the (2i+1)th reference voltages are directly transmitted to the second switch array, and when the first bit of the input signal is at a first voltage level, the first voltage is transmitted to the second output terminal, and the second voltage is transmitted to the first output terminal.

    摘要翻译: 提供具有两个输出的数模转换器(DAC)的实施例。 DAC由n位输入信号控制,并且包括产生(2n + 1)个参考电压的参考电压电路,第一开关阵列和第二开关阵列。 第一开关阵列在(2n + 1)个参考电压中接收并输出2n个选择的参考电压到第二开关阵列。 第二开关阵列根据输入信号经由第一输出端子和第二输出端子经由第一输出端子输出第一电压,其中第(2i + 1)个参考电压被直接发送到第二开关阵列,并且当 输入信号的第一位处于第一电压电平,第一电压被发送到第二输出端,并且第二电压被发送到第一输出端。

    OPERATIONAL AMPLIFIER, SOURCE DRIVER OF A DISPLAY, AND METHOD FOR CONTROLLING THE OPERATIONAL AMPLIFIER THEREOF
    6.
    发明申请
    OPERATIONAL AMPLIFIER, SOURCE DRIVER OF A DISPLAY, AND METHOD FOR CONTROLLING THE OPERATIONAL AMPLIFIER THEREOF 有权
    显示器的操作放大器,源驱动器及其操作放大器的控制方法

    公开(公告)号:US20100156855A1

    公开(公告)日:2010-06-24

    申请号:US12340761

    申请日:2008-12-22

    申请人: Ching-Chung Lee

    发明人: Ching-Chung Lee

    IPC分类号: G09G5/00 H03F3/16

    摘要: An operational amplifier includes a first stage, a second stage, and a switching unit. The first stage receives an analog input signal. The second stage has an output node coupled to an output switch. The switching unit is coupled between the first stage and the second stage. The switching unit includes a capacitive component and a first switch coupled to the capacitive component in series. The first switch is turned off when the output switch is turned on. The first switch is turned off while the analog input signal is in transition, and is turned on while the analog input signal is steady. The first switch is turned on when the output switch is turned off.

    摘要翻译: 运算放大器包括第一级,第二级和开关单元。 第一级接收模拟输入信号。 第二级具有耦合到输出开关的输出节点。 开关单元耦合在第一级和第二级之间。 开关单元包括电容性部件和串联连接到电容部件的第一开关。 当输出开关打开时,第一个开关关闭。 当模拟输入信号处于转换状态时,第一个开关关闭,模拟输入信号稳定时导通。 当输出开关关闭时,第一个开关打开。

    Source driving circuit for preventing gamma coupling
    7.
    发明授权
    Source driving circuit for preventing gamma coupling 有权
    用于防止伽马耦合的源极驱动电路

    公开(公告)号:US07663422B1

    公开(公告)日:2010-02-16

    申请号:US12202542

    申请日:2008-09-02

    申请人: Ching-Chung Lee

    发明人: Ching-Chung Lee

    IPC分类号: H03L5/00

    CPC分类号: H03K3/35613

    摘要: During transition, level shifters in a source driver output logic high signals to PMOS DACs and output logic low signals to NMOS DACs for shutting down current paths in the PMOS DACs and in the NMOS DACs. Therefore, during transition, the PMOS DACs and the NMOS DACs are at high-impedance stage for preventing gamma coupling effect.

    摘要翻译: 在转换期间,源极驱动器中的电平移位器向PMOS DAC输出逻辑高电平信号,并向NMOS DAC输出逻辑低电平信号,以关闭PMOS DAC和NMOS DAC中的电流路径。 因此,在转换期间,PMOS DAC和NMOS DAC处于高阻抗级,用于防止伽马耦合效应。

    SOURCE DRIVER WITH PLURAL-FEEDBACK-LOOP OUTPUT BUFFER
    8.
    发明申请
    SOURCE DRIVER WITH PLURAL-FEEDBACK-LOOP OUTPUT BUFFER 审中-公开
    源反馈输出缓冲器的源驱动器

    公开(公告)号:US20100033411A1

    公开(公告)日:2010-02-11

    申请号:US12185822

    申请日:2008-08-05

    申请人: Ching-Chung Lee

    发明人: Ching-Chung Lee

    IPC分类号: G09G3/36

    摘要: A source driver of a display includes a first channel. The first channel includes a first amplifier, a first output switch, and a first feedback loop. The first output switch selectively connects an output node of the first amplifier to one of output pads of the source driver. The first feedback switch connects an input node of the first amplifier to one of the output pads or the output node of the first amplifier.

    摘要翻译: 显示器的源驱动器包括第一通道。 第一通道包括第一放大器,第一输出开关和第一反馈回路。 第一输出开关选择性地将第一放大器的输出节点连接到源驱动器的输出焊盘之一。 第一反馈开关将第一放大器的输入节点连接到第一放大器的输出焊盘或输出节点之一。

    Operational amplifier, source driver of a display, and method for controlling the operational amplifier thereof
    9.
    发明授权
    Operational amplifier, source driver of a display, and method for controlling the operational amplifier thereof 有权
    操作放大器,显示器的源极驱动器以及用于控制其运算放大器的方法

    公开(公告)号:US08411015B2

    公开(公告)日:2013-04-02

    申请号:US12340761

    申请日:2008-12-22

    申请人: Ching-Chung Lee

    发明人: Ching-Chung Lee

    IPC分类号: G09G3/30

    摘要: An operational amplifier includes a first stage, a second stage, and a switching unit. The first stage receives an analog input signal. The second stage has an output node coupled to an output switch. The switching unit is coupled between the first stage and the second stage. The switching unit includes a capacitive component and a first switch coupled to the capacitive component in series. The first switch is turned off when the output switch is turned on. The first switch is turned off while the analog input signal is in transition, and is turned on while the analog input signal is steady. The first switch is turned on when the output switch is turned off.

    摘要翻译: 运算放大器包括第一级,第二级和开关单元。 第一级接收模拟输入信号。 第二级具有耦合到输出开关的输出节点。 开关单元耦合在第一级和第二级之间。 开关单元包括电容性部件和串联连接到电容部件的第一开关。 当输出开关打开时,第一个开关关闭。 当模拟输入信号处于转换状态时,第一个开关关闭,模拟输入信号稳定时导通。 当输出开关关闭时,第一个开关打开。

    Circuit for resetting system and delay circuit
    10.
    发明授权
    Circuit for resetting system and delay circuit 有权
    电路复位系统和延迟电路

    公开(公告)号:US08350612B2

    公开(公告)日:2013-01-08

    申请号:US12609381

    申请日:2009-10-30

    IPC分类号: H03H11/26

    CPC分类号: H03K17/223

    摘要: A reset circuit and a delay circuit are provided. The delay circuit includes a first resistor module, a second resistor module, a switch module and a capacitor module. First terminals of the first and the second resistor modules are coupled respectively to a first voltage and a second voltage. The switch module have a control terminal served as a input terminal of the delay circuit, a first terminal served as a output terminal of the delay circuit, a second terminal coupled to a second terminal of the first resistor module, and a third terminal coupled to a second terminal of the second resistor module. In the delay circuit, the first terminal selectively connected to the second terminal or the third terminal in accordance with the control terminal. The capacitor module couples between the first terminal of the switch module and the second voltage.

    摘要翻译: 提供复位电路和延迟电路。 延迟电路包括第一电阻器模块,第二电阻器模块,开关模块和电容器模块。 第一和第二电阻器模块的第一端子分别耦合到第一电压和第二电压。 开关模块具有作为延迟电路的输入端子的控制端子,作为延迟电路的输出端子的第一端子,耦合到第一电阻器模块的第二端子的第二端子和耦合到 第二电阻模块的第二端子。 在延迟电路中,第一终端根据控制端选择性地连接到第二终端或第三终端。 电容器模块耦合在开关模块的第一端和第二电压之间。