摘要:
An output buffering circuit of a driver device for a display includes a first amplifier circuit having a first input stage, coupled between an upper power supply and a lower power supply, and a first output stage, coupled between the upper power supply and a first intermediate power supply that is greater than the lower power supply, and a second amplifier circuit having a second input stage coupled between the upper power supply and the lower power supply, and a second output stage coupled between a second intermediate power supply that is lower than the upper power supply and the lower power supply.
摘要:
An output buffering circuit of a driver device for a display includes a first amplifier circuit having a first input stage, coupled between an upper power supply and a lower power supply, and a first output stage, coupled between the upper power supply and a first intermediate power supply that is greater than the lower power supply, and a second amplifier circuit having a second input stage coupled between the upper power supply and the lower power supply, and a second output stage coupled between a second intermediate power supply that is lower than the upper power supply and the lower power supply.
摘要:
A DAC includes a gamma voltage generator for generating a plurality of gamma voltages, and a decoder for receiving an M-bit digital value for selecting one of the gamma voltages, wherein the decoder comprises a first thermometer encoder, a first selector and a second selector. The first thermometer encoder is utilized to receive N bits of the digital value to generate a first thermometer code with 2N bits, wherein N is smaller than M, and M and N are positive integers. The first selector has a plurality of selecting groups, each selecting group having 2N switches controlled by the first thermometer code to output one gamma voltage, where the second selector receives the gamma voltages outputted by the selecting groups of the first selector and outputs one gamma voltage selected from the received gamma voltages based on the (M−N) bit of the digital value.
摘要:
An electronic stabilizer includes an output transformer, a variable frequency/power amplifying loop, a low voltage variable frequency rectifying loop, and two elements of high resistance value. The primary side of the output transformer is connected with the variable frequency/power amplifying loop. The secondary side of the output transformer is connected with the low voltage variable frequency rectifying loop and the voltage boosting and lamp lighting loop. The elements of high resistance value are connected with the nodes of the various frequency/power amplifying loop and the low voltage variable frequency rectifying loop. The electronic stabilizer is adapted to an environment of direct current low voltage or direct current high voltage in which a low voltage bias current is provided to drive a lamp.
摘要:
An embodiment of a digital to analog converter (DAC) with two outputs is provided. The DAC is controlled by an n-bits input signal and comprises a reference voltage circuit generating (2n+1) reference voltages, a first switch array and a second switch array. The first switch array receives and outputs 2n selected reference voltages among the (2n+1) reference voltages to the second switch array. The second switch array outputs a first voltage via a first output terminal and a second voltage via a second output terminal according to the input signal, wherein the (2i+1)th reference voltages are directly transmitted to the second switch array, and when the first bit of the input signal is at a first voltage level, the first voltage is transmitted to the second output terminal, and the second voltage is transmitted to the first output terminal.
摘要:
An operational amplifier includes a first stage, a second stage, and a switching unit. The first stage receives an analog input signal. The second stage has an output node coupled to an output switch. The switching unit is coupled between the first stage and the second stage. The switching unit includes a capacitive component and a first switch coupled to the capacitive component in series. The first switch is turned off when the output switch is turned on. The first switch is turned off while the analog input signal is in transition, and is turned on while the analog input signal is steady. The first switch is turned on when the output switch is turned off.
摘要:
During transition, level shifters in a source driver output logic high signals to PMOS DACs and output logic low signals to NMOS DACs for shutting down current paths in the PMOS DACs and in the NMOS DACs. Therefore, during transition, the PMOS DACs and the NMOS DACs are at high-impedance stage for preventing gamma coupling effect.
摘要:
A source driver of a display includes a first channel. The first channel includes a first amplifier, a first output switch, and a first feedback loop. The first output switch selectively connects an output node of the first amplifier to one of output pads of the source driver. The first feedback switch connects an input node of the first amplifier to one of the output pads or the output node of the first amplifier.
摘要:
An operational amplifier includes a first stage, a second stage, and a switching unit. The first stage receives an analog input signal. The second stage has an output node coupled to an output switch. The switching unit is coupled between the first stage and the second stage. The switching unit includes a capacitive component and a first switch coupled to the capacitive component in series. The first switch is turned off when the output switch is turned on. The first switch is turned off while the analog input signal is in transition, and is turned on while the analog input signal is steady. The first switch is turned on when the output switch is turned off.
摘要:
A reset circuit and a delay circuit are provided. The delay circuit includes a first resistor module, a second resistor module, a switch module and a capacitor module. First terminals of the first and the second resistor modules are coupled respectively to a first voltage and a second voltage. The switch module have a control terminal served as a input terminal of the delay circuit, a first terminal served as a output terminal of the delay circuit, a second terminal coupled to a second terminal of the first resistor module, and a third terminal coupled to a second terminal of the second resistor module. In the delay circuit, the first terminal selectively connected to the second terminal or the third terminal in accordance with the control terminal. The capacitor module couples between the first terminal of the switch module and the second voltage.