摘要:
A method for testing a device under test (DUT) during a test sequence. In accordance with one embodiment, during a regular, pre-defined test sequence, data packets are transferred from a tester to a device under test (DUT) containing data related to at least one of an identification parameter of the DUT, an operational characteristic of the DUT and a request for data. Examples of such transferred data include address data for identifying the DUT (e.g., a unique media access control (MAC) address) and calibration data for controlling an operational characteristic of the DUT (e.g., signal power levels, signal frequencies or signal modulation characteristics). In accordance with another embodiment, the DUT retrieves and transmits data to the tester, either in response to the request for data or as a preprogrammed response to its synchronization with the tester.
摘要:
A system and method for testing multiple-input-multiple-output (MIMO) devices under test (DUTs) with multiple radio frequency (RF) signal testers. Each tester receives one or more RF signals from one or more of the DUTs, and the testers are mutually coupled in a ring such that successive ones receive a trigger input signal from an upstream tester and provide a trigger output signal to a downstream tester. Each tester is responsive to its input trigger signal and its one or more RF signals by providing its output trigger signal such that its output trigger signal has an asserted state initiated in response to an assertion of its input trigger signal and a transcending of a predetermined magnitude by at least one of the one or more RF signals.
摘要:
A digital communications test system and method for testing a plurality of devices under test (DUTs) in which multiple sets of a single vector signal analyzer (VSA) and single vector signal generator (VSG) can be used together to perform error vector magnitude (EVM) measurements for one or more DUTs in parallel, including one or more of composite, switched and multiple input multiple output (MIMO) EVM measurements. This allows N pairs of a VSA and VSG to test N DUTs with N×N MIMO in substantially the sane time as a single VSA and VSG pair can test a single DUT, thereby allowing a substantial increase in testing throughput as compared to that possible with only a single VSA and VSG set.
摘要:
A method and system for testing a wireless data packet transceiver as a device under test (DUT) adapted to operate in conformance with a wireless signal standard such that a transmitted signal, when received by an intended receiver, is to result in a responsive signal transmission acknowledging such signal reception. During testing, responsive signal transmissions, e.g., acknowledgement signals, are withheld by the test system until after a predetermined number of data packets have been captured from the DUT, until a predetermined time interval has passed, or until data packets at a predetermined number of data rates have been captured from the DUT.
摘要:
A method and system for testing packet error rate in electronic devices by transmitting a series of data packets from a testing device to a device under test (DUT) and setting a predefined number of received error-free data packets; evaluating whether a number of data packets from the series of data packets received error-free by the DUT equals the predefined number of received error-free data packets and transmitting additional data packets from the testing device to the DUT, at a power level known to produce zero received-packet errors in a correctly operating DUT, if the number of data packets from the series of data packets received error-free by the DUT does not equal the predefined number of received error-free data packets. Additional possible embodiments include evaluating whether a total number of data packets from the series of data packets and the additional error-free-power-level data packets received error-free by the DUT equals the predefined number of received error-free data packets and transmitting a confirmation data packet to the testing device in response to reception by the DUT of the predefined number of received error-free data packets.
摘要:
Circuitry and method for reduce test time for wireless signal systems by using dynamic adaptive correction of DC offsets generated by the test instrument. The data signal is sampled for downstream processing including during pre-, inter-, or post-packet time intervals where no packet-data signal is occurring and where the device's power amplifier is turned off. The sampled data signal is measured for a DC offset occurring during these inter-packet time gaps. Compensating DC offset values are stored in a table indexed by frequency, gain and temperature range. When a subsequent test is carried out at that frequency, gain, and temperature range, the stored compensation value is used to correct the signal. DC offsets continue to be measured, stored and applied to captured signals, continuously refining the compensation values and decreasing the need for time-intensive calibrations. When a measured DC offset exceeds pre-determined limits, the instrument undergo a calibration step.
摘要:
A system and method for testing a data packet signal transceiver in which multiple network addresses (e.g., media access control, or MAC, addresses) are used to establish synchronization of the device under test and the test equipment controlling the test. In accordance with an exemplary embodiment, synchronization is established using a first MAC address, following which testing is conducted using a second MAC address.
摘要:
Signal conversion circuitry and method for converting a multiple input, multiple output (MIMO) packet data signal transmission to a plurality of complex data samples for processing by shared test equipment, e.g., a single vector signal analyzer (VSA).
摘要:
A digital communications test system and method for testing a plurality of devices under test (DUTs) in which multiple sets of a single vector signal analyzer (VSA) and single vector signal generator (VSG) can be used together to perform error vector magnitude (EVM) measurements for one or more DUTs in parallel, including one or more of composite, switched and multiple input multiple output (MIMO) EVM measurements. This allows N pairs of a VSA and VSG to test N DUTs with NxN MIMO in substantially the sane time as a single VSA and VSG pair can test a single DUT, thereby allowing a substantial increase in testing throughput as compared to that possible with only a single VSA and VSG set.
摘要:
A digital communications test system and method for testing a plurality of devices under test (DUTs) in which multiple sets of a single vector signal analyzer (VSA) and single vector signal generator (VSG) can be used together to perform error vector magnitude (EVM) measurements for one or more DUTs in parallel, including one or more of composite, switched and multiple input multiple output (MIMO) EVM measurements. This allows N pairs of a VSA and VSG to test N DUTs with N×N MIMO in substantially the sane time as a single VSA and VSG pair can test a single DUT, thereby allowing a substantial increase in testing throughput as compared to that possible with only a single VSA and VSG set.