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公开(公告)号：US06319644B2
公开(公告)日：2001-11-20
申请号：US09780407
申请日：2001-02-12
IPC分类号： G03F900
CPC分类号： G03F1/36 , G03F7/70441
摘要： Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.
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公开(公告)号：US06284419B1
公开(公告)日：2001-09-04
申请号：US09769603
申请日：2001-01-24
IPC分类号： G03F900
摘要： Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.
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公开(公告)号：US06120952A
公开(公告)日：2000-09-19
申请号：US164786
申请日：1998-10-01
IPC分类号： G03F1/00 , G03F1/36 , G03F7/20 , H01L21/027 , G03F9/00
CPC分类号： G03F1/36 , G03F7/70441
摘要： Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.
摘要翻译： 描述了将集成电路图案从掩模转印到半导体衬底上的平版印刷工艺中的邻近效应的降低方法。 在一个实施例中，期望的间隔被定义在要驻留在掩模上并且要被转印到基板上的主要特征之间，以及相邻的邻近效应校正特征之间。 在间隔定义之后，相对于邻近效应校正特征调整主要特征的尺寸以实现期望的转移的主要特征维度。 在另一个实施例中，在具有边缘的主要特征和相邻的子分辨率特征之间限定期望的间隔。 主要特征的边缘相对于子分辨率特征移动以实现所需的传送主要特征维度。
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公开(公告)号：US20050003281A1
公开(公告)日：2005-01-06
申请号：US10896985
申请日：2004-07-23
CPC分类号： G03F1/36 , G03F1/26 , G03F7/70433
摘要： A semiconductor pattern mask that might otherwise exhibit three-fold symmetry, which could give rise to distorted semiconductor features in the presence of three-leaf aberration in the optical system used to expose a semiconductor wafer through the mask, is altered to break up the three-fold symmetry without altering the semiconductor features that are formed. This accomplished by adding features to the mask that break up the symmetry. One way of achieving that result is to make the added features of “sub-resolution” size that do not produce features on the exposed wafer. Another way of achieving that result is to change existing features that do form structures in such a way (e.g., with optical elements) that changes the relative phase, amplitude or other characteristic of light transmitted through those features.
摘要翻译： 另外可能会出现三重对称性的半导体图形掩模，其可能在用于通过掩模暴露半导体晶片的光学系统中存在三叶像差的情况下引起失真的半导体特征，以分解三 而不改变所形成的半导体特征。 这通过在面具中添加特征来分解对称性来实现。 实现该结果的一种方式是使得“分辨率”尺寸的附加特征在曝光的晶片上不产生特征。 实现该结果的另一种方式是改变以这样一种方式形成结构的现有特征（例如，利用光学元件），其改变透过这些特征的光的相对相位，幅度或其它特性。
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公开(公告)号：US20060093927A1
公开(公告)日：2006-05-04
申请号：US11305197
申请日：2005-12-19
CPC分类号： G03F1/36 , G03F1/26 , G03F7/70433
摘要： A semiconductor pattern mask that might otherwise exhibit three-fold symmetry, which could give rise to distorted semiconductor features in the presence of three-leaf aberration in the optical system used to expose a semiconductor wafer through the mask, is altered to break up the three-fold symmetry without altering the semiconductor features that are formed. This accomplished by adding features to the mask that break up the symmetry. One way of achieving that result is to make the added features of “sub-resolution” size that do not produce features on the exposed wafer. Another way of achieving that result is to change existing features that do form structures in such a way (e.g., with optical elements) that changes the relative phase, amplitude or other characteristic of light transmitted through those features.
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公开(公告)号：US20050014078A1
公开(公告)日：2005-01-20
申请号：US10919059
申请日：2004-08-16
CPC分类号： G03F7/70941 , G03F1/36 , G03F1/70 , G03F7/70433
摘要： Reticles having reticle patterns suitable for reducing edge of array effects are provided. The reticle patterns have unresolvable patterns formed in the periphery areas of the reticle patterns. The unresolvable patterns are non-transparent with respect to patterning radiation. Systems incorporating the reticles are also provided. Additionally, methods of forming and using the reticles are provided.
摘要翻译： 提供了具有适于减少阵列效应边缘的掩模版图案的网状物。 标线图案具有在分划板图案的周边区域中形成的不可分辨图案。 关于图案化辐射，不可分辨的图案是不透明的。 还提供了包含标线的系统。 此外，提供了形成和使用掩模版的方法。
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公开(公告)号：US20060081900A1
公开(公告)日：2006-04-20
申请号：US11293245
申请日：2005-12-05
申请人： William Baggenstoss
发明人： William Baggenstoss
IPC分类号： H01L31/113
CPC分类号： H01L27/1462 , H01L27/14601 , H01L27/14609 , H01L27/14625 , H01L27/14629 , H01L27/14643
摘要： A pixel cell having a photosensor within a silicon substrate; and an oxide layer provided over the photosensor, the oxide layer having a grated interface with said silicon substrate, and a method of fabricating the pixel cell having a grated interface.
摘要翻译： 一种在硅衬底内具有光电传感器的像素单元; 以及设置在所述光传感器上的氧化物层，所述氧化物层具有与所述硅衬底的格栅界面，以及制造具有磨碎界面的像素单元的方法。
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公开(公告)号：US20060011955A1
公开(公告)日：2006-01-19
申请号：US10893276
申请日：2004-07-19
申请人： William Baggenstoss
发明人： William Baggenstoss
IPC分类号： H01L31/062
CPC分类号： H01L27/1462 , H01L27/14601 , H01L27/14609 , H01L27/14625 , H01L27/14629 , H01L27/14643
摘要： A pixel cell having a photosensor within a silicon substrate; and an oxide layer provided over the photosensor, the oxide layer having a grated interface with said silicon substrate, and a method of fabricating the pixel cell having a grated interface.
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